Painless MCU implementation of space vector modulation for electric motor systems -

Painless MCU implementation of space vector modulation for electric motor systems

Space vector modulation (SVM) has become the most popular voltage modulation technique for use with field-oriented control (FOC) based electric motor systems. The most common SVM techniques in use today involve directly manipulating the voltage states in order to generate the desired voltage vector without requiring a look-up table or trigonometric calculations. A lesser-known technique gives developers the ability to seamlessly transition into the over-modulated mode of operation, in addition to sharing the above benefits. In this article, the underpinnings of SVM will be presented from a graphical perspective along with supporting equations.

SVM Trigonometry
Most three-phase electric motors do not give access to their neutral connection. SVM takes advantage of the floating neutral inside of the motor and uses the full DC buss voltage. In Figure 1, three voltage vectors are shown: Va is on the X-axis while Vb is shifted 120 degrees and Vc is shifted 240 degrees.

Figure 1: Voltage space vectors that represent the three winding potentials of a three-phase electric motor. (Source: Texas Instruments)

The DC buss voltage (Vbuss ) spans the two horizontal lines that intersect with Vb and Vc . In this case, the three-phase line-line voltage Vbc fully utilizes Vbuss .

Figure 2 illustrates what happens when the voltage vectors are rotated 90 degrees from the X-axis while keeping the neutral at the center of Vbuss . Currently, the buss voltage is not large enough to create voltage vector Va . This is the case when pure three-phase sinusoids are modulated on a carrier wave to create a three-phase PWM. To create three symmetrical sinusoids, all voltage vectors’ magnitudes will have to be reduced. The amount that each voltage vector has to be reduced is described below:

This reduces the peak-to-peak voltage by 15.5 percent.

Figure 2: By keeping the neutral at the center of Vbuss , the magnitude of the voltage vector Vb has to be reduced at certain angles of motor rotation. (Source: Texas Instruments)

The SVM technique takes the three-phase vectors in Figure 2 and shifts them all down so that the magnitude of the phase voltage does not have to be reduced. Taking Figure 2 and shifting its neutral downward, as shown in Figure 3, allows voltage vector Va to have the same magnitude. In the case of Figure 3, the neutral is shifted down from Vbuss /2 by:

Shifting down works fine for Figure 3, but what about the case where Va is pointing straight down instead of up? In that case, we would need to shift all the voltage vectors up by an amount equal to 0.1443 of Vbuss . In other words, the amount of common-mode bias which needs to be added to all of the voltage vectors is dynamic and is a function of the angle of the space vector rotation.

Figure 3: Shifting the neutral downward allows vector Va to keep a larger magnitude. (Source: Texas Instruments)

Figure 4 shows 360 degrees of rotation of a SVM waveform. You can also see the orientation of the voltage vectors and what path the neutral takes.

click to see larger image

Figure 4: A full rotation of the SVM waveform at 30 degree angles. Va is the reference point for the vector plots. (Source: Texas Instruments)

Next page >>

SVM Creation
SVM is used in a microcontroller (MCU) where calculations must be kept to a minimum. When first studying SVM, it gives the impression that three sinusoids and one triangular waveform must be created. If this were the case, then SVM would be processor and memory intense. It is much simpler than one would expect since no sinusoidal calculations or lookup tables are needed. Let’s first figure out how the three-phase waveforms are created.

In a FOC system, control is completed in a synchronous reference frame where most signals look like a DC waveform. Then the synchronous signals are transformed into the stationary reference frame via the inverse Park transform. Only two signals occur in the stationary reference frame and they are time varying. While in a steady state, the signals take the form of a sine and cosine. The SVM must take these two V α and V β signals from the stationary reference frame and convert them into a three-phase (Va , Vb and Vc ) output. In an embedded processor, the output of the SVM algorithm must be PWM waveforms which can easily be created with the PWM peripherals of the MCU.

The three processes of creating the SVM are listed below:

  1. Perform the inverse Clarke transform to convert V α and V β into Va , Vb and Vc . The inverse Clarke algorithm is below:
  2. Create the triangular neutral by using the equation:
  3. Subtract Vneutral from Va , Vb and Vc .

After step 3, the SVM signals are loaded into the PWM peripheral compare registers. The five plots in Figure 5 show the different magnitudes of each signal, which create a SVM waveform that has 100 percent duty-cycle at its peak.

Figure 5: The waveforms that are used to create SVM from the three above steps. (Source: Texas Instruments)

SVM Over-Modulation
In the previous section, we created an SVM waveform that can have a peak value up to 100 percent duty-cycle of Vbuss . This produces a pure line-to-line voltage sinwave. The possibility still exists to create even more voltage, but not in pure sinewave form.

Looking at Figure 6, the SVM waveform as it currently has been described can cover anywhere inside of the green circle. The unused regions that are shaded in orange can be utilized by over-modulation. When in full over-modulation, the voltage vector Vs will cover the whole hexagon. Over-modulation will create a trapezoidal output waveform where the advantages are higher fundamental sinewave amplitudes (with some harmonics) and lower switching losses.

Figure 6: The trajectory that the SVM voltage vector traverses as it rotates through 360 degrees. (Source: Texas Instruments)

From Figure 5, the maximum and minimum peak of V α and V β is ±1/√3 and this corresponds to a trajectory on the perimeter of the green circle of Figure 6. As the input of the Clarke transform becomes larger than 1/√3, the SVM waveform will grow beyond ±½, which is not possible.

Figure 7: Over-modulation of the SVM waveform with an input of 2/3 magnitude into the Clarke transform. The dashed, horizontal, magenta lines represent the old ½ magnitudes. (Source: Texas Instruments)

Figure 7 shows what happens as the input magnitude of the Clarke transform becomes larger than 1/√3 and is instead 2/3. The old magnitude of the SVM was at ±½ as shown by the magenta dashed lines; now the peak magnitude is at 1/√3. What is nice about this SVM technique is that the transition into over-modulation is easy. All that is needed to limit the output of the waveform is to limit the maximum and minimum values of Va , Vb and Vc of the SVM output. A block diagram of the total SVM system with over-modulation is shown in Figure 8.

Figure 8: SVM with over-modulation block diagram used to code the MCU. (Source: Texas Instruments)

The SVM voltage output is limited by the three saturation elements that are set to the 100 percent and 0 percent duty-cycles, which is ±½. The resulting waveform in full over-modulation is shown in Figure 9.

Figure 9: SVM algorithm when in full over-modulation. (Source: Texas Instruments)

Space vector modulation is an effective technique used for field-oriented control when converting voltage signals from two-phase alpha-beta to three-phase A, B, C. SVM takes advantage of shifting the three-phase neutral value to allow full line-to-line utilization of the DC buss. One technique for creating SVM has been shown. The advantage of this technique is that it is easy to implement in an MCU since it doesn’t require any sinusoidal calculations or look-up tables. Also, it can transition to over-modulation very smoothly. The C code for this algorithm is located in the InstaSPIN-FOC™ solution, part of the MotorWare™ libraries, and can be downloaded at After installing MotorWare software, open the following folder:
C:timotorwaremotorware_1_01_00_*swmodulessvgensrc32bsvgen.h .

Mohan, Ned. Advanced Electric Drives: Analysis, Control and Modeling using Simulink . Minnesota Power Electronics Research & Education, 2001. Print.

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.