LONDON The Zeroplus LAP-C (16064) is a 16-channel, PC-based logic analyzer whose standard package includes the IIC, SPI, UART & 7-segment protocol analyzer plug-ins.
The Zeroplus patented waveform compression technology increases the effective sample memory capacity beyond the physical 2Mbit. All 16 channels of the LAP-C (16064) can achieve a compression rate up to 255- depending on the data content.
The logic analyzer connects to a PC via USB and supports the full 480Mbps USB 2.0 speed, but also can use 12Mbps USB 1.1.
The protocol analyzer module enables the decoding of 54 different bus protocols from multimedia, automotive, IC interface, memory to PC systems and protocols including I2C, UART, SPI, 1-Wire, and CAN. A user defined trigger condition and setting mode is available for both serial signal and parallel signals as well as trigger delay functions.
Logic analyzers maybe linked to increase both capture memory and the number of channels. Software tools provide waveform zoom, a data width automatic demonstration mode, fast demonstration full pattern mode and a data comparison demonstration mode.
It works with Windows 98SE/ME/2000/XP/Vista operating systems and has a sample rate for its internal clock (timing mode) of 100Hz – 100MHz while the sample rate for external clock (state mode) is 100MHz.
The memory depth (per channel) is 64Kbit and the threshold voltages working range is -6V to +6V with an accuracy of -/+ 0.1V.
The Zeroplus LAP-C is available through The Debug Store web site.