PCI Express/RapidIO bridge impacts processors & backplanes - Embedded.com

PCI Express/RapidIO bridge impacts processors & backplanes

A PCI Express Gen2 to Serial RapidIO (S-RIO) Gen2 protocol conversion bridge has been developed by Integrated Device Technology Inc. to extend scalable RapidIO-enabled peer-to-peer multiprocessor clusters to the x86 processor environment.

The IDT Tsi721 device brings together two interconnect protocols and opens up new applications and markets for RapidIO as well as complementing IDT’s portfolio of Gen1 and Gen2 PCIe and RapidIO switches and bridges.

It is a 16 Gbps PCIe Gen2 to 16 Gbps RapidIO Gen2 bridge that translates the PCIe protocol to RapidIO and vice versa. This will enable existing RapidIO systems in the wireless, defense, imaging, and industrial markets to make use of Intel’s market-leading processors.

The IDT Tsi721 offers 8 direct memory access (DMA) and 4 Messaging engines/channels, each capable of transferring large amounts of data and operating at line speeds of 16 Gbps. This enables the allocation of multiple engines per core or context in a multi-core, multi-threaded system – vastly simplifying system level software development. Furthermore, the device provides a compelling option for system-wide interconnect of Intel-based processors in a distributed multi-processing environment, offering performance that is superior to that of other interconnects such as 10GigE with respect to throughput, latency and overall system-level power.

Enterprise cloud computing and server markets that already use PCIe-Gen2-enabled processors will be able to take advantage of RapidIO as a backplane interconnect resulting in a solution that IDT says is not easily implemented nor scalable with non-transparent bridging techniques for PCIe.

The bridge  will allow OEMs to deploy x86-based RapidIO systems with peer-to-peer clustering, scalability, low end to end system latency, and hardware enabled fault isolation.

An early adopter of the Tsi721 is Curtiss-Wright Controls Embedded Computing which will use it to combine RapidIO with Intel’s i7 and other embedded processors to deliver “overall system processing and interconnect performance which was not possible with available native-RapidIO processors”.

The IDT Tsi721 is currently sampling to qualified customers, is available in a 13x13mm FCBGA package and is priced at $49 each, in volume.

Tsi721 software support is available for Linux and Windows and evaluation systems will be available in the third quarter of 2011.

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