Performance-optimizing embedded designs -

Performance-optimizing embedded designs

At the Embedded Systems Conference (ESC) 2013 at DESIGN West, being held this year on April 22 to 25, three design tracks and almost two dozen classes are devoted to systems design and systems engineering topics. If you take the time to attend any or all of them, I believe you'll be well prepared to face many of the challenges that embedded systems developers encounter.

[ Click here to register for DESIGN West 2013 , April 22-25 at the San Jose McEnery Convention Center. Options range from an All-Access Pass–which includes Black Hat (security) Conference Session to Free Expo Admission. Use promo code EDIT10 for your 10% discount to attend DESIGN West conference sessions.]

I can think of at least two reasons why systems design issues are at the top of agenda this year at ESC DESIGN West. First, with the increasing use of 32-bit microcontrollers and advanced designs with multiple 32-bit cores, code sizes are enlarging exponentially, requiring a system level view of things.

Second, in many advanced designs, hardware and software development is much more tightly integrated than ever before. The degree to which this is so is well illustrated in “Android hardware/software design using virtual prototypes,” a four part series by Achim Nohl. Indeed, as TI's Sandeep Yaddula points out in “The hardware (and software) implications of CPU Endianness in SoC design,” software tightly integrated with the capabilities of the underlying SoC architecture is often key to the performance of the hardware in an embedded design.

Several ESC classes on system design on my list of must-attends are being taught by Robert Oshana, director of Global Software R&D for Networking and Multimedia at Freescale Semiconductor. At the top of that list is “Software Performance Engineering” (ESC-418 ), where he teaches the proper way to manage software performance via systematic planning to enable you to predict the emerging software's performance throughout the development process.

“This is important in embedded real-time systems where performance is an explicit, measurable requirement,” he notes, “Achieving performance goals is not something you want to think about toward the end of the software development process!”

The software performance engineering (SPE) method he will discuss is the topic of a three part series on . It and a number of other related articles are included in this week's Embedded Tech Focus Newsletter on “Performance-optimizing embedded designs .” SPE, he says, is a comprehensive way of managing performance throughout the lifecycle, that includes many practical guidelines and principles for creating scalable, and responsive software. He expands on this topic in a number of other related classes, targeting specific segments of embedded hardware and software co-design, including:

Multicore Software Development Practices for Embedded Systems (ESC-229 )
System Integration and Test Techniques (ESC-334 )
A Rigorous but Practical Specification Technique for Embedded Systems (ESC-310 )

As Oshana points out, there are four key aspects of optimizing embedded system performance:

  1. Determining what “performance” means to you: raw clock rate, interrupt service routine response, lowest possible power, the best performance/ power trade off;
  2. The best ways to measure that performance metric;
  3. The best ways to test the system to be sure it meets your requirements; and
  4. Determining the best system design environment in which to accomplish these goals.

My Editor's Top Picks of articles that best address these topics are:

Down & dirty with hardware/software co-design
Hardware/software co-verification basics
Using CMMI for software requirements testing in system design
Leveraging virtual platforms for embedded software validation
Thread synchronization for multicore system power/performance tradeoffs

To further complement your education in this important topic, the three Conference Tracks at ESC DESIGN West to check out are: Software Architecture and Design, Software Development, and Systems Engineering, so take a look and register to attend. Aside from one or more of Oshana's classes, several other presentations I hope to attend include: Agility in the embedded world (ESC-307 ), Agile requirements, estimation, and planning (ESC-227 ), and System engineering in automotive design (ESC-326 ) See you there! Site Editor Bernard Cole is also editor of the twice-a-week newsletters as well as a partner in the TechRite Associates editorial services consultancy. He welcomes your feedback. Send an email to , or call 928-525-9087.

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