PICMG releases COM-HPC carrier board design guide - Embedded.com

PICMG releases COM-HPC carrier board design guide

Guide is helpful for both electronics design and PCB layout engineers designing custom system carrier boards for COM-HPC modules.

For electronics engineers and PCB layout engineers designing custom system carrier boards for COM-HPC modules, PICMG has released a freely available 160-page COM-HPC carrier board design guide.

COM-HPC – short for computer-on-module (COM) high performance computing (HPC) – is a new open computer-on-module form factor standard that targets extremely high I/O and computer performance levels from high end clients up to the entry server class and even beyond. Standard COM-HPC modules plug into a carrier or baseboard that is typically customized to the application. Benefits for OEMs are fast and cost-effective layout with high design security for application specific embedded and edge computing boards on the basis of open standards.

In the guide, especially helpful is the detailed discussion of the challenging module to carrier board Ethernet KR and KR4 backplane signaling. To save pins on COM-HPC modules, the sideband signals for the 10G / 25G / 40G / 100G Ethernet KR interfaces are serialized and must then be deserialized on the carrier board. The design guide provides instructions for this in a series of diagrams.

PICMG-COM-HPC-Carrier-Design-Guide
(Image: PICMG)

Additionally, the guide provides enhanced schematics and block diagrams for all provided interfaces such as Serial ATA, PCI Express up to Gen 5, USB4, Boot SPI, eSPI, eDP, MIPI-CSI, SoundWire, asynchronous serial port interfaces, I2C/I3C, GPIO, System Management Bus (SMBus), thermal protection and module type detection. PCB design rule summaries further enable engineers to efficiently design fully signal compliant COM-HPC carrier boards.

Also, a section has been added to discuss mechanical considerations including heat spreader/module attachment, alternative board stack assemblies and board stiffeners for carrier boards. Information about all COM-HPC interfaces and a list of useful books to facilitate carrier board designs are also in the guide.

PICMG points out that electronic design engineers and printed circuit board developers should note that while the design guide contains additional detailed information it does not replace the PICMG COM-HPC specification. It said in a press release, “For complete guidelines on the design of COM-HPC compliant carrier boards and systems, it is necessary to refer to the full specification – the design guide is not intended to be the only source for any design decisions. Besides consulting the latest COM-HPC specification, it is also strongly recommended to use the module vendors’ product manuals as a reference.”

The design guide and base specification are accompanied by a platform management interface specification, and the COM‑HPC EEEP. The existing embedded API (eAPI) specification also applies to COM-HPC.

Christian Eder, chairman of the COM-HPC committee, said, “This comprehensive document will further accelerate the fast start of the COM-HPC standard. While the specification documents in themselves are already of great use for developers, the detailed carrier board design guide helps to avoid design problems, especially when handling high-speed signals, such as PCIe Gen 5 and USB4. I expect to see further time-to-market improvements for COM-HPC-based solutions.”

Eder, marketing director at congatec, acted as the chairman of the COM-HPC committee, and was previously a draft editor of the current COM Express standard. Stefan Milnor from Kontron and Dylan Lang from Samtec supported Christian Eder in their respective functions as editor and secretary of the PICMG COM-HPC committee.


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