PLS GmbH adds support for Qorivva to its Universal Debug Engine -

PLS GmbH adds support for Qorivva to its Universal Debug Engine

Coinsiding with the recent introduction by Freescale of its latest multicore Qorivva derivates for use in automotive designs , PLS GmbH has come up with customized and optimised versions of its Universal Debug Engine.

Specifically, it has been upgraded to suppiort the following Freescale multicore SoCs: MPC5746M, MPC5777M, MPC5748G, MPC5746C, MPC77xK and MPC574xP.

The preconfigured versions of the standard UDE, are designed to simplify debugging with features such as support for fast and reliable programming of the flash memory which is integrated in various sizes on the Qorivva devices.

Using the UDE multicore/multiprogram loader, relevant program codes and the corresponding debug information can be assigned to individual cores in a flexible way. In addition, it supports the heterogeneous structure of the SoCs which have in addition to the main core a number of other programmable units such as a Generic Timer Module (GTM) or a Hardware Security Module (HSM).

By core-specific grouping of debugger windows (optionally with automatic fade in and fade out depending on the active core as well as different coloring) UDE's tool provides developers with an overview of their complete multicore system in just one single consistent user interface.

Control of the diverse cores by the debugger is carried out via UDE's multi-run control function, which enables an almost synchronous start and stop of the various cores by making use of debug logic integrated on the respective chip.

In addition, debugging is simplified by newly implemented multicore breakpoints in the UDE. Using this feature, shared code in an application can simultaneously act as breakpoint for all cores . Data breakpoints allow the recognition of read and/or write accesses to a variable. A certain expected value can even be optionally taken into account.

In this particular set of UDE optimizations, the company has taken care to provide support of all possible trace variants. While data transfer takes place via a conventional parallel port with the types MPC5746C, MPC5748G and MPC574xP, a serial high-speed interface based on the Aurora protocol is available for the devices.

This makes possible the use of type-dependent four or two lanes each with 1.25 Gbps data transfer rate, with no performnance limitations via the Aurora trace pod. Also. for parallel trace, users can make use of a pod with up to 32-bit recording width.

The various device-specific optimizations of the UDE are particularly useful in automotive motor control designs using the MPC5746M and MPC5777M that were specifically designed for motor controls.

The UDE optimizations also take advantage of the few KByte trace memory Freescale has included on the Qorivva devices, where, along with a similarly integrated Signal Processing Unit (SPU) for trouble shooting.

Normally the SPU can usually only be laboriously programmed at register level. Making use of the UDE emulation configurator, the tool can be easily configured for various measurement tasks.

In addition to controlling the trace recording, the UDE's underlying state machine model also allows the definition of complex breakpoints with sequencer logic.

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