PMC/XMC IO module integrates digitizing with signal processing - Embedded.com

PMC/XMC IO module integrates digitizing with signal processing

The X6-GSPS from Innovative Integration integrates high-speed digitizing with signal processing on a PMC/XMC IO module for demanding DSP applications.

The X6-GSPS features two, 12-bit 1.8 GSPS A/Ds that can be interleaved to use as one 3.6 GSPS digitizer. Analog input bandwidth of over 2.5 GHz supports wideband applications and undersampling. The sample clock is from either a low-jitter PLL or external input. Multiple cards can be synchronized for sampling and down-conversion.

A Xilinx Virtex6 SX315T (LX240T and SX475T options) with 4 banks of 1GB DRAM provide a very high performance DSP core with over 2000 MACs (SX315T). The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates.

The X6-GSPS power consumption is 20W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation from -40 to +85C operation and 0.1 g2/Hz vibration. Conformal coating is available.

The tight coupling of the digitizing to the Virtex6 FPGA core realizes architectures for SDR, RADAR, and LIDAR front end sensor digitizing and processing. The PCI Express system interface sustains transfer rates over 2 GB/s for data recording and integration as part of a high performance realtime system.

The FPGA logic can be fully customized using VHDL and MATLAB using the Frame Work Logic tool set. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator. IP cores for many wireless, DSP and RADAR functions such as large-scale preintegrator, DDC, PSK/FSK demod, OFDM receiver, correlators and large FFT are available.

Innovative Integration

   

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.