In this era wirelessly connected devices, smart grids, and concerns aboutpower consumption in every system with an embedded processor, at the topof every system developer’s priority list is finding the best ways to achievethis goal without necessarily sacrificing performance.
But trying to find the right mix of power versus performance for theapplication and develop the hardware and software building blocks to do sowith efficiency and low cost is like herding cats – an almost impossibletask requiring close attention at all times.
Complicating this job are the constant “improvements” in process technologydown to the nanometer range that have nonlinear side-effects that make thisan even a greater challenge. This means hardware and software developershave to be constantly learning about the latest techniques for power optimizationto both compensate and take advantage of such effects.
For the most recent and up-to-date classes and hands-on tutorials fullof tips and tricks you can apply to optimizing your designs for power, register to attend ESC DESIGN West inSan Jose, Ca. April 22 to 25.
[ Click here to register for DESIGN West 2013 , April22-25 at the San Jose McEnery Convention Center. Options range from an All-AccessPass – which includes Black Hat (security) Conference Session to Free ExpoAdmission].
At the conference you will have your choice of almost a dozen classesin a three day LowPower Design track , of which the classes I am most interested include:
“Low-powerBenchmarking and What Datasheets Don't Show You ,” in which HorstDiewald will discuss the status and capabilities of microcontroller poweroptimization as well as the advantages and trade-offs of different poweroptimization techniques.
“WirelessPower Management for Battery Power,” where Curt McNamara and EugenFeraru deal with such questions as: What impact does the choice of wirelesstype have? Can the designer trade off distance or through-put for batterylife? Is the chip type and manufacturer the most critical, or is it the driver?Can you put a wireless interface to sleep? What are the advantages to gatheringdata and transferring in batches?
“EnergyHarvesting for Microcontroller s ” in which Todd Baker lectures onhow to maximize solar panel power output into storage mediums such as batteriesor super capacitors as well as low-power applications and methods for minimizingpower consumption.
“Measuring,Controlling and reducing power consumption , ” in which Microchip engineerswill talk about how power is used in a typical microcontroller design andhow to control it efficiently, using the company’s eXtreme Low Power PICMCUs to illustrate ways to measure, convert, and harvest power.
To complement this motherload of tips and tricks at ESC DESIGN West, the EmbeddedTech Focus this week on “The low down on low power ,” includestwo recent columns by Jack Ganssle on “Profilingpower ,” and “Thewell-engineered uCurrent . ” In addition are a number of recent designarticles, webinars, news and product stories that I hope you will find useful.
Also, on Embedded.com we have created an archive of Collected Articles on “Designingfor low power, ” of which my Editor’s Top Picks are:
Power efficiency trade-offs key to wireless sensing success
Design considerations for power sensitive embedded devices
Selecting the Optimal Battery for your Embedded Application
Systemlevel software centric power debugging
Power aware verification of ARM-based design
Embedded.com Site Editor Bernard Cole is also editor of thetwice-a-week Embedded.comnewsletters as well as a partner in the TechRite Associates editorialservices consultancy. He welcomes your feedback. Send an email to , or call928-525-9087.