Power saving technology produces first silicon - Embedded.com

Power saving technology produces first silicon


Cambridge, UK — Adiabatic Logic has completed the first silicon implementation of its low power Intelligent Output Driver (IOD) technology.

Geoff Harvey, Adiabatic Logic's chief technology officer, said, ” Achieving over 50% power savings with our first test chip is a significant achievement and we will improve this through a program of incremental development, which will include a further tape out with refinements before the year-end.”

The IOD IP cell is designed to replace the conventional pad drivers in an IC and uses a patented energy recycling technique, which in simulated tests delivered 50-75% power savings in chip I/O for portable devices such as laptops, smartphones, handheld computers, digital cameras and MP3 players.

The IOD uses the speed of submicron CMOS to actively mimic the voltage-current drive characteristics of a classic driver with a source (or series) terminator resistor. It does this in such a way that the bulk of the current is delivered to the load capacitance non-resistively from a reservoir capacitance maintained at a mid rail voltage, assisted by the inherent inductance of the load. The on-chip reservoir capacitance delivers charge on rising edges and recovers charge on falling edges thereby recycling energy, which is conventionally wasted.

Adiabatic Logic is part of the Cambridge Technology Group and was spun out of Cambridge-based technical design consultancy, OptionExist in May 2002. At the end of 2002 it won a £45,000 Small Firms Merit Award for Research and Technology (SMART) from Department of Trade and Industry (DTI)'s Small Business Service.

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