MachXO3D secure control FPGA receives security certification from NIST -

MachXO3D secure control FPGA receives security certification from NIST


Lattice Semiconductor announced its MachXO3D FPGAs for secure system control received the National Institute of Standards and Technology’s (NIST) Cryptographic Algorithm Validation Program (CAVP) certification. CAVP validates that critical MachXO3D cryptographic algorithms are compliant with Federal Information Processing Standards (FIPS), the U.S. federal government’s standard for cryptographic software.

By complying with both the CAVP and NIST’s Platform Firmware Resilience specifications, the MachXO3D FPGA’s security mechanisms can protect, detect and recover the device and other system components from unauthorized firmware access throughout its entire operating life: from the device’s initial integration, through system shipment, installation and its entire operational life.

Key features of the MachXO3D include up to 9K look-up tables for implementing logic that instantly configures at power up from on device flash memory, on-device regulator for single 2.5/3.3-volt power supply operation, support for up to 2700 Kbits of user Flash memory and up to 430 Kbits sysMEM embedded block RAM to provide more flexible design options, up to 383 I/Os, configurable to support LVCMOS 3.3 to 1.0.