MCU debug on a pin-count budget

Craig Greenberg, Texas Instruments - January 25, 2009


Microcontrollers have served the requirements of a broad range of applications for many years. With the advent of lower pin-count offerings, microcontrollers enable embedded processing to be available just about anywhere--from automobile electronics to electronic toothbrushes.

However, as the need for more functionality offered by these lower pin-count devices increases, the amount of overhead pins required has become a critical factor. Overhead pins include power and ground supplies, dedicated pins for isolation, reset pins, and test.

Basically, overhead pins are any pins not directly available for the user for the application. For embedded programmable devices, this typically includes all the pins necessary to interface to the device for software/hardware tools related to debugging and programming the device and its firmware, as well as support for the internal testing needs of the semiconductor manufacturer.

Traditionally, these pins have been dedicated pins at the cost of additional overhead. Otherwise, they were multiplexed with the existing functional pins of the device. Although this concept helps reduce the overall pin count, it doesn't allow for all functional pins to be readily available during debug or emulation. Multiplexing can therefore make hardware and firmware development quite challenging.

At Texas Instruments, we developed a Spy-Bi-Wire interface to address the needs of a simple interface that was easy to implement, required a small footprint in terms of silicon usage, needed no special hardware, and could leverage existing MSP430 microcontroller development systems. Of primary importance was that the interface needed to use a minimum number of interconnects to the device for communication. Meeting all of these constraints enabled the continued availability of low-cost development and test tools, key to continued growth of the MSP430 microcontroller user base.

The MSP430 microcontroller platform has used a standard JTAG interface as its primary development tool interface since the devices were first introduced. This interface is used not only to interface to MSP430 development tools, but also for device test purposes.

The IEEE 1149.1 specification outlines a four- or five-wire interface, commonly referred to in most literature as the JTAG interface, or just JTAG. JTAG stands for Joint Test Action Group, which is the group under which the original standard was developed prior to it becoming an IEEE standard. Please refer to IEEE 1149.1 for additional details and information.

The standard was developed to provide a consistent, efficient way to test many devices present on a system board. The interface allows for communication between all the devices in a series connection and supports various instructions. These instructions, along with optional input data, can be serially fed into a device via a host master, and the results of the instruction can be serially read from the device back to the host master.

The standard also requires that certain instructions be supported by all devices adhering to the standard. The standard also allows instructions to be added, thereby allowing the standard interface to support specific needs for any particular device. These instructions can be used for additional test capabilities, device emulation, and other required device functions. This expandability gives the designer of various devices great flexibility in creating features necessary for sufficient emulation and test capabilities.

A typical microcontroller development environment is shown Figure 1. The emulation tool is normally a piece of hardware that is driven via a host, such as a PC. Software on the host translates the desired operation into a sequence of JTAG commands. The JTAG engine converts these commands and sends them onto the JTAG interface signals. The host along with the emulation tool initiates all communication to the target device. Therefore, the emulation tool behaves as the master in a master-slave system, with the target device acting as the slave.

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The JTAG interface uses a minimum of four interconnects--TMS, TCK, TDI, and TDO. The heart of the JTAG interface is a simple state machine called the Test Access Port (TAP) controller.

Figure 2 shows the TAP controller. Each state of the TAP controller is reached via a sequence of TMS levels for each rising transition of the clock signal, TCK. Depending upon the sequence, the TAP controller will enter a particular mode of operation, such as reading data into the data register or the instruction register.

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The concept of Spy-Bi-Wire was simple: obtain all the benefits of JTAG, completely reuse JTAG test capability and, of course, minimize the pins from four or five to only two. The interface needed to be simple and fast.

A typical MSP430 emulation system that uses Spy-Bi-Wire is shown in Figure 3. The emulator hardware/software tool converts JTAG commands and serializes them into a two-wire format. The serialized JTAG commands are then interpreted by the two-wire Spy-Bi-Wire interface of the target device. In other words, the Spy-Bi-Wire is a serial to parallel converter.

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Spy-Bi-Wire uses time division multiplexing to convert the serialized JTAG commands into parallel JTAG commands that can be used by the TAP controller residing on the target device. Spy-Bi-Wire requires two signals. SBWTCK is the clock signal and SBWTDIO is the data input/output signal.

Figure 4 shows the typical timing of the Spy-Bi-Wire interface. Three time slots are allocated--one called the TMS slot, the TDI slot, and the TDO slot. At each rising edge of SBWTCK, the sequencing of the slots repeat in time: TMS slot, TDI slot, TDO slot, repeating indefinitely.

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In this way, the Spy-Bi-Wire interface on the emulation tool is effectively taking a time sample of all the critical JTAG lines (TMS, TDI, and TDO) and serializing them over three time slots. Once the serialized commands are received, they are converted back to the four-wire mode to be processed by the TAP controller. Thus, the standard TAP controller can be used as specified in its entirety.

Because SBWTDIO can behave as input or output, the direction of the pin is set based on the time slot. For the TDI slot, SBWTDIO is an input. During a TDO slot, SBWTDIO is automatically set to output. During the TDO slot, it's critical that the emulation tool release its drive on the SBWTDIO to avoid any contention on the interface signal.

The Spy-Bi-Wire was critical to the introduction of the low-pin-count MSP430F20xx series of devices. The goal was to minimize the overhead of the four-wire JTAG interface so that the entire device could be exercised and debugged within the emulation environment.

The Spy-Bi-Wire uses two pins, one for the clock (SBWTCK) and the other for data input/output (SBWTDIO). SBWTCK is a dedicated pin, where as SBWTIDO is shared with the device reset pin, /RST. The /RST pin was chosen since it didn't contain a critical secondary function and was common to all devices presently and for the foreseeable future.

The trick was how to share the /RST pin with data input and output and not reset the device during Spy-Bi-Wire communication. In addition, it was important for the /RST to behave like a reset when desired while connected to the tool. This was accomplished by a simple filter that was based on the SBWTCK signal. As long as the SBWTCK is held high or toggled at a minimum specified frequency, the internal /RST function of the device is overridden and disabled. Therefore, any SBWTDIO low-going transitions will be ignored. If the SBWTCK signal is held low long enough, the /RST will behave as a normal /RST. This effectively brings the overhead pins of the Spy-Bi-Wire interface to a single pin.

The Spy-Bi-Wire interface is simple two-wire interface that leverages the standard IEEE 1149.1 JTAG interface protocols. The interface can be created with a very small amount of logic, maintains compatibility to existing JTAG emulation schemes, and can achieve relatively high performance due to its simple synchronous timing. With the possibility of multiplexing at least one of the Spy-Bi-Wire pins, an effective one-wire overhead is possible. The Spy-Bi-Wire interface helps to enable lower pin-count devices with full emulation/ test capability, while not sacrificing any device functionality within a development environment.

Craig Greenberg is a systems development engineer with Texas Instrument's MSP430 microcontroller group where he is senior member of the Technical staff. In this capacity, he is responsible for defining and developing new products and peripherals to support the MSP430 customer base. He received his BS in electrical engineering from Pennsylvania State University, MS in computer science from University of Texas at Dallas, and an MBA from University of Texas.