Reconfigurable-processor SoC gains DSP core - Embedded.com

Reconfigurable-processor SoC gains DSP core

The STW1200, a multi-purpose microcontroller that's aimed at wireless infrastructure equipment, has been enhanced by the addition of a 600-MHz 16/32-bit dual-MAC DSP core. Designed by STMicroelectronics, the part is fabricated using ST's 130-nm CMOS technology. The new device is dubbed the STW22000. It includes a 300-MHz ARM926EJ-S RISC core, 16 Mbits of embedded DRAM, an eFPGA (embedded Field-Programmable Gate Array) block, reconfigurable interfaces, and an array of analog and digital peripherals including data converters.

The additional ST122 DSP core combines VLIW and RISC features to achieve the optimum balance between performance and size. Also embedding a dedicated CDE (convolutional decoder engine), the STW22000 is a low-cost alternative for baseband signal processing in 2G cellular modems and other signal-processing applications. Software development on the programmable logic is supported by an integrated software tool chain that encompasses traditional FPGA tool providers. This enables the programming, debug, and validation of the reconfigurable interfaces within a unique design environment. Nearly any independent third-party software tool chain can be used for the software development on the CPU core. ST also provides development tools for the embedded DSP core, to evaluate the performance, and to develop, debug, and integrate application code on the chip through an ARM/DSP environment. The STW22000 is available now with a price range of $30. More information can be found at www.st.com/stonline/books/ascii/docs/11335.htm.

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