Renesas develops two-channel master IO-Link chip - Embedded.com

Renesas develops two-channel master IO-Link chip

A two-channel single-chip IO-Link solution for IO-Link master applications from Renesas Electronics is based on cooperation with its business partners ELMOS Semiconductor AG and TMG-Karlsruhe.

The  IO-Link solution combines Renesas Electronics’ 78K0R-based 16-bit microcontroller and the two-channel Elmos IO-Link transceiver in a small 9 x 9 mm QFN package.

IO-Link is the new standard serial digital communications protocol used for sensors and actuators in industrial automation systems.

Renesas Electronics’ master solution integrates a complete two-channel master transceiver along with the master software stack operating on the 78K0R CPU core. It allows development of a scalable solution with up to 32 channels when combining several of the IO-link master chips via a single SPI based sum protocol.

Alternatively, system designers can connect an upper layer device through the UART protocol. The key benefit for the system designer is the offload of the master related stack functions from a central controller that usually operates the application software of an IO module or IO box and the uplink protocol such as PROFINET or Ethernet/IP.

The master stack – currently under development by TMG Karlsruhe – will support IO-Link Version 1.1. Alternatively, system designers can develop and maintain their own software stacks. The transceiver integrates significant analogue components, which enable system designers to eliminate the use of additional external components and develop a complete IO-Link master product at low cost.

To support system designers in using the IO-Link single-chip solution, Renesas Electronics is producing a  development kit that will be available from Q1 FY2011  

Samples of Renesas Electronics’ master single-chip IO-Link solution are planned for Q1 FY2011. Mass production of the new devices is scheduled to begin in Q3 FY2011.

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