At the Renesas Developer Conference in Garden Grove, Ca., EMMBC benchmarks run in demonstrations of the RX600 mirocontrollers optimized with IAR Systems Workbench achieved a score of 3.12 CoreMarks/MHz, what they claim is a world record.
The CoreMark benchmarks .org were run on an RX62N MCU. Based on Renesas’ high-performance RX core, the RX62N MCU is part of the wider RX600 series, which includes devices from 32KB up to 2MB of on-board flash and numerous variants, featuring a comprehensive set of on-chip communications and control functions.
The RX62N and RX63N groups, for instance, include Ethernet, USB 2.0 (host and device) and CAN, and meet the connectivity needs of industrial applications such as building management and factory automation systems within smaller form-factor, cost-effective devices.
The latest version of IAR Embedded Workbench for RX, released in June 2012, included major enhancements to the already very efficient code optimization techniques.
Now, the techniques have been even further refined. The optimizations for code size and execution speed provided by the IAR C/C++ Compiler perform on multiple levels, global as well as core/target-specific.
It is now possible to tune the optimizations to achieve the best possible configuration for the application at hand. Major functions of the optimizer, such as loop unrolling and function inlining, can be controlled individually, and by setting different optimizations for different parts of the code, the right balance between size and speed can be achieved.
IAR Embedded Workbench features multi-file compilation, which allows the optimizer to operate on a larger set of code and can result in smaller code, and linker-level removal of unused code.