Rex offers 10x leap with open source parallel CPU - Embedded.com

Rex offers 10x leap with open source parallel CPU

SAN JOSE, Calif. — A startup founded by two teenagers is designing a parallel processor that it hopes delivers a 10x leap in performance per watt for high-end systems. Rex Computing will make open source its instruction set architecture in hopes of rallying supporters around it.

The startup's ambitions are high, as explained by chief executive Thomas Sohmers, who recently became old enough to sign the company's contracts. He aims to create an alternative to today's processors and accelerators, which are too expensive (mainly in power consumption) to scale to the exaflop performance researchers hope to deliver in the next decade.

We've got a long and difficult road ahead of us as an industry. It's pretty well accepted, going down the current path with Intel and Nvidia processors following Moore's Law, that there's a pretty good chance we won't get to exascale systems by the current time estimates. So we need something new, and we're trying to deliver that, but it's a tough sell. There's a lot of reluctance to go for something new.

Sohmers was recently elected co-chairman of the high-performance working group under the Open Compute Project (OCP) started by Facebook. He hopes Rex can finish the design of its neo core as early as January and make it open source through the group.

“The idea is for this to be a base architecture others can build on for future systems,” he said. “It would be the first OCP project to go all the way to silicon. Other members would contribute on-chip interconnects and actual Verilog and RTL.”

The 3W Neo chip packs into 80 mm2 256 cores (one of which is shown above), each consisting of a 64-bit ALU, IEEE floating point unit, and 128 KBytes of SRAM scratch pad memory. Each core has a 16 Gbyte/s link to its neighbors with about 384 Gbytes/s of aggregate bandwidth between chips.

Sohmers was inspired by Adapteva's Epiphany chip, on which he based his first prototypes. But the chip lacked the memory bandwidth and double precision support he wanted.

To read more of this external content, go to “New metric for top supercomputers. http://www.eetimes.com/document.asp?doc_id=1324759&page_number=2

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