RS-485 is the chosen physical layer standard for numerous industrial communication systems, such as PROFIBUS systems, or for connecting devices like PLCs, SCADA systems, RTUs, or MODBUS systems. High-speed and ultra-high-speed RS-485 data links usually employ relatively simple configurations such as single or parallel point-to-point, full- or half-duplex, or multi-drop, as shown in Figure 1 .
Figure 1 Typical configurations for high-speed RS-485 links.
These simple diagrams hide a multitude of design considerations, from transceiver selection and board layout at each node to cable choices and interconnect geometry. To satisfy end-user demands for ever greater data rates and longer cable lengths, while ensuring minimal discernible data errors, all of these aspects must be taken into account and optimized. This article examines key design considerations engineers should keep in mind with high-speed data transmission, provides a bus node design example with general design guidelines and layout recommendations.
Signal degradation in the form of jitter is the key factor that limits practicable cable lengths. This signal jitter is the result of both driver and receiver pulse skews and pattern-dependent cable skew. Driver and receiver pulse skew is the difference in propagation delays for the rising and falling edges of the driver and receiver.
Bit-pattern dependent cable skew is the variation of signal rise and fall times on the bus caused by varying bit sequences. Data pulses respond to bit-pattern dependent skew with a loss in amplitude, rounded edges, displacement in time, and a “smearing” of the pulse into adjacent bit intervals.
Applying a data coding scheme, such as Manchester, 8b/10b, or 33hex, helps to reduce jitter. Encoding the data stream introduces transitions into the data stream in order to charge and discharge the cable capacitance more equally, and generate more consistent signal amplitudes. However, because data encoding shortens the charge and discharge time of the cable capacitance, the bus signal amplitude is reduced.
To provide the receiver with a reliable input signal, high-speed transceivers with large differential output voltage (VOD ) and low skew are recommended. The large VOD overcomes the reduction in signal amplitude due to cable attenuation, data encoding and common-mode loading, and ensures sufficient noise margin at the remote receiver inputs.
For low-voltage designs, beware of so-called “poor man’s” 3V transceivers with output stages that are only capable of providing RS-485 compliant output voltages at supply voltages above 4V. At lower supply rails, the transistor efficiency drastically drops, producing a VOD up to 40% below the 1.5V minimum required by RS-485. Such a low output will not yield sufficient noise margin to trigger a remote receiver.
Intersil high-speed transceiver families with very high output drive capability have minimum VOD ranging from 160% of the specified 1.5V minimum at 4.5V supply down to 100% at 3.0V supply, thus delivering true 3V RS-485 compliant drive capability. The typical VOD s measured at the highest operating temperatures exceed RS-485 requirements by 27% for 3V and by 70% to 93% for 5V transceivers.
In addition, a small pulse skew minimizes transceiver contribution to the data link’s total jitter budget. All Intersil high-speed transceivers are specified with a maximum pulse skew of 1.5ns. Moreover, part-to-part skew, which is also an important consideration in synchronous applications, is better than 4ns.
Continue to page 2 on Embedded's sister site, EDN: “High-speed connections require RS-485.”