RTL power optimization platform improves runtime by factor of 2 - Embedded.com

RTL power optimization platform improves runtime by factor of 2

Calypto Design Systems announced version 5.0 of itsPowerPro Platform, a full suite of RTL power optimization tools provento reduce power by up to 60 percent on multi-million gate designs. ThePowerPro Platform features new RTL power analysis capabilities,production-proven optimization techniques for reducing dynamic andleakage power in the logic, memory, and embedded processor sections ofan SoC, and is the only solution that provides sequential formalequivalence checking.

Version 5.0 of the PowerPro Platform improves turnaround time by 2Xcompared to its predecessor and includes new usability features such asadvanced reset-logic insertion, bottom-up flow support, a strongersequential analysis engine for PowerPro MG (Memory Gating), and theability to read the Fast Signal Database (FSDB), which eliminates theneed for large Value Change Dump (VCD) files. In addition, each PowerPromodule can run in a fully automatic or a manual mode, giving users theflexibility to select the use mode most appropriate for each section oftheir design. The manual use mode graphically illustrates the powerreducing RTL modifications that can be made, but leaves it up to theuser to decide how best to implement them.

PowerPro Analyzer provides new RTL power analysis capabilities andcomplete visualization of PowerPro CG and PowerPro MG optimizations,allowing users to view power optimizations in the context of RTL sourcecode, schematic display, sortable reports (ASCII, HTML, CSV, XML), anddesign hierarchy. PowerPro Analyzer is used in the PowerAdviser flow toprovide the design and power information that designers can use tomanually optimize their design.

SLEC Pro comprehensively verifies the power optimized RTL generatedby PowerPro. SLEC Pro is a formal, functional sequential logicequivalence checker that ensures functional equivalence between theoriginal RTL design and the corresponding power optimized RTL design forall possible input sequences.

Visit Calypto Design Systems at www.calypto.com

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