According to Al Crouch, co-chairman of the IEEE IJTAG working group and a chief technologist at ASSET InterTech, ratification of the IJTAG (IEEE P1687 IJTAG) standard is expected during the second half of 2011.
The IJTAG standard specifies an access architecture and protocol for instruments that are embedded into semiconductor chips. In addition, it defines how these embedded instruments can be managed, accessed and automated, and their output analyzed.
The IJTAG standard will enable a new generation of embedded validation, test and debug methods for chips, circuit boards and systems. For the first time, validation and test routines will be portable. The routines or vectors based on IJTAG will hold tremendous value for manufacturers because they will migrate along with the instruments in the chips and be re-used during every stage in the integration and product life cycle.
Starting with core intellectual property (IP) and chip development, a device’s IJTAG capabilities will move with it into circuit board assembly and eventually into system integration, field deployment and repair. Before the IJTAG standard, separate and unrelated validation routines and test vectors were developed at each stage in a system’s life cycle, compounding unnecessarily the cost of finished products. Manufacturers could pass along reduced costs to users and achieve higher quality and greater reliability in their products because of the more thorough validation and test methods made possible by IJTAG.
To gain advantage in the marketplace, the beta version of the ScanWorks IJTAG toolkit for developers from ASSET InterTech has already been deployed by two equipment manufacturers and Flextronics, the electronic manufacturing services (EMS) firm.
ScanWorks IJTAG provides tools that can read IJTAG’s two languages, Instrument Connectivity Language (ICL) and Procedural Description Language (PDL), and exercise embedded IJTAG instruments. ICL defines the connections among embedded instruments in chips and on circuit boards while PDL is an extension of the popular Tcl (Tool command language) for programming validation, test and debug vectors to be executed by IJTAG instruments.
“Our early users have provided us with valuable insight into the functionality that chip and circuit board designers need to take full advantage of IJTAG’s many integration and product life-cycle benefits. Certainly the rapid adoption of any standard depends upon the support it receives from firms across the industry,” said Scott Hack, ASSET’s product manager for ScanWorks IJTAG tools.
“Embedded instruments have been placed in chips for some time now; we’re just now getting around to capitalizing on them by standardizing how we access and re-use them,” added Hack. “For example, certain built-in self test (BIST) capabilities have been in chips for years, but they were never readily accessible or easy to use for system-on-a-chip (SoC), circuit board and system developers. Now they are because of tools like ScanWorks IJTAG.”
The initial release of ScanWorks IJTAG-DL (Developers License) targets developers who will be embedding IEEE P1687 IJTAG instruments and infrastructure capabilities into their devices, and validation and test engineers who will be applying IJTAG tests to circuit boards and systems.
It will be available during the first quarter of 2011 from ASSET and its distributors. Subscription pricing begins at $14,000.