While it has long been the purview of electronic product vendors to rise to the challenges of managing ever shortening product life cycles, a new trend is afoot that may turn the tables in favor of longer platform hardware life cycles.
As embedded programmable processor based features increase in power, increasingly sophisticated platform System on Chip (SoC) architectures, including configurable hardware, boot code, firmware, and system software now bring to systems the ability to modify basic hardware functions and features without redesigning the SoC from scratch.
The real trick is how to efficiently and securely manage these changes to system hardware throughout the supply chain. For conceptually newer products there will be requirements that drive configuration of in-market system features. In other words, the customer may have the ability in the future to upgrade his product with premium system features after his or her original purchase.
Platform Oriented Architecture Trend
An important trend that has been gaining traction over the past several years is the movement by chip architects toward Platform Oriented Architectures (POA). This is by no means an original concept since the microcontroller and its successors have been a very good examples of POA types of devices over the years.
Clearly, an embedded programmable controller, processor, or DSP can be modified via software to satisfy any number of functional requirements. As an extension of the embedded programmable processor (or controller), a Field Programmable Gate Array (FPGA) provides the ultimate POA conceptual device. One chip can support any number of hardware designs and may even be re-configured in-system.
Of course, due to the restrictions of cost for high volume applications and the unforgiving nature of silicon, hardware systems are typically optimized for the product applications they support. Thus, most product lines have traditionally required multiple chips within a chipset to address each market segment these chips serve. Why then is it important to now consider trends toward what the author has designated POA devices several decades after the invention of the FPGA?
Inevitably the answer to the above question is a matter of economics. A new and more flexible style of architecture is needed in the aftermath of the Structured ASIC (application-specific integrated circuit).
The failure of the Structured ASIC to find a home in between FPGA and ASIC technologies may arguably be the result of the time sensitivity chip designers have with regards to rapid increases in production volume.
In other words, the cost benefits of going with a Structured ASIC solution do not justify including a Structured ASIC step in the migration path from an FPGA in to an ASIC in order to reduce the unit cost as production volume warrants.
A contributing factor to the lack of popularity of the Structured ASIC is the fact that such a device cannot, by definition, serve broad application requirements and be adequately optimized to those same requirements at the same time.
In recognition of this, chip architects are now realizing the benefits of leveraging structured architectures for more narrowly defined application requirements. A multi-media player SoC is illustrated below as an example of a POA SoC device that takes this approach (Figure 1 below ).
|Figure 1. Multi-media Application Processor Feature Control|
Within the POA block diagram, there are a number of firm or soft configurable elements within the architecture that may activated or de-activated by issuing secure Feature Control Tickets (FCTs) to an embedded digital asset control core embedded in the POA architecture.
These FCTs may be stored permanently in the SoC's internal non-volatile memory (NVM) or temporarily in volatile memory. These FCTs are essentially switches that may be used to turn on or off features in hardware, firmware, or software and which are secured by a hardware root of trust. For this reason, it is imperative that the FCT and the memory used to store the status of an FCT controlled feature be protected. Each FCT issued to a device should be unique to that device.
By isolating a successful attack on an FCT to a single device, such an attack on an FCT is prevented from compromising all other devices shipped into the market. The importance of a hardware root of trust and security will be discussed in more detail in a later section.
POA Costs and Benefits
With the passing of more than two dozen generations of Moore's Law, the cost of a single logic transistor is now approaching zero. With very low unit costs for manufacturing highly complex system chips, the risk of a new design is increasingly tied to non-recurring expenses (NREs) incurred during the design, prototyping, and verification phases of bringing a new chip design to market.
For modestly more NREs and unit cost, a single POA chip may replace what traditionally would have required a chipset design program with multiple chip designs. While modestly more expensive to design and manufacture, the savings per year far outweigh the additional costs (Figure 2 below ).
|Figure 2. POA Verses Chipset Savings|
Due to the sensitivity of price erosion as electronic component inventory ages, the capability to reduce inventory and forecast error results in large savings for manufacturing. The savings increases as volume production ramps. Additional considerations are the development costs of debugging and verifying three chips rather than a single POA device.
With regards for forecasting a single POA chip across three device configurations as opposed to forecasting a product mix for a chipset with three different die, end customers will also be much happier since allocations due to forecast error will be substantially reduced. Reducing the risk of stocking out will also result in increased revenue and market share.
Each design start has a different set of requirements both functionally and economically depending on the targeted application and market forecast. For cost sensitive and high volume consumer electronic chip designs, the ability to cover a product segment with a single chip provides a number of competitive advantages. These advantages are not only economic.
As illustrated above, a POA approach will produce development and operational cost savings, but will also create new ways of attracting increased market share (Table 1 below ).
|Table 1. POA Pro's and Con's|
The manufacturing owner will be able to better optimize inventory by selling all configurations from a single Stock Keeping Unit (SKU) that is configured and marked just prior to shipping. Likewise, the owner of marketing responsibilities will be able to price products with restricted features low and still have the opportunity to sell these customers premium feature at a later date.
Before POA, if a customer purchased a slower computer chip, she may experience buyer's remorse for not having spent the extra money to get a faster machine. With a POA device, that same customer would have the option to “activate” higher performance, as well as other premium features at a later date if she chooses.
The Era of Intellectual Property
During the 1980s and early 1990s, it was semiconductor chips that delivered new technologies for system developers. While product system architects and engineering managers are still coping with recent changes, the delivery vehicle for new electronic technologies is now Intellectual Property (IP).
IP comes in many forms such as silicon IP, firmware, technology (patent) licensing and software. To further emphasize this point, all technologists both on the procurement side and the sales side of the electronic industry spend a portion of their day negotiating and reading licensing terms and conditions.
|Table 2. POA Applications and Optional Features|
Since a technology company's most valuable assets are now tied up in IP, the protection and management of a company's digital assets are rapidly becoming more important than the protection and management of its physical assets.
For POA-based devices and systems, the prospects for virtualizing SKUs, as well as supporting aftermarket feature and/or conditional access service activation, further emphasize a powerful shift toward the importance of securing electronic device and system IP (Table 2 above ).
POA Requires a Hardware Root of Trust
For any technology company that has poured investment into product development to produce a superior product, it is understandably in that company's best interest to protect its investment.
As markets cross global borders where IP protections and rights are viewed differently, legal protections may no longer be effective. This is particularly true in high-tech where product life cycles are relatively short and development cycles arguably move much faster than the law, even in more traditional markets.
Due to the open nature of most systems, in terms of hardware that runs system software, security has been a challenge. For example, how long does it take an experienced engineer to probe or poke through software in system memory or on disk to find an installation or security encryption key?
For those among us with security expertise, it has long been observed that many security schemes are not developed by security experts, which is one reason why young hackers are often so successful. For this reason, security experts have long been striving for ways to make strong security more accessible to non-security product development engineers and information technology (IT) engineers.
To deliver on the promise of easy-to-implement, strong and effective security that is still user friendly, multiple disciplines are required. This has made security that keeps sensitive electronic information private a challenge. After all, software resides on hardware which is physical, must be debugged and tested, and may be observed visually and electronically.
It has long been understood by security experts that a root of trust (ROT) is essential to system security (Figure 3 below ). A ROT is a secret that if kept will not compromise the security of the overall system. A ROT is necessary to provide: (1) a safe place for system-critical secrets, (2) secure processes and (3) extended trust to internal and external entities. Securing the ROT has posed a fundamental challenge.
More recently, this idea has been extended to the concept of a hardware root of trust (HROT) since software has been vulnerable to attack. This is because software is hosted on commonly known and understood hardware, and a software image is for practical purposes identical across all instances of its existence on a general-purpose hardware platform.
A HROT, on the other hand, may provide a ROT that is unique to each system or device and one that provides much stronger security to even the most sophisticated forms of attack. New embedded non-volatile memory (NVM) technologies and security IP cores are establishing strong security, which makes it economically impractical to mount an attack on systems which leverage one or both of these more recent technologies.
|Figure 3. HROT Protects System Information|
In the current global information age, securing off-shore and third-party manufacturing facilities to a company's secure internal facilities to protect sensitive data requires secure channels to protect sensitive product technology, as well as internal and third-party (trade) secrets.
This requires IT infrastructure support that manages and leverages the HROT in combination with secure server platforms that protect against tampering in low-trust or no-trust environments.
In combination, the elements required to form this secure channel are a small footprint embedded security IP core that provides the ROT, a secure server appliance that may be co-located in a hostile environment, including hardened system and application software for managing sensitive information throughout the manufacturing, distribution and retail channel (Figure 4 below ).
|Figure 4. Third Party Manufacturing and Supply Chain Security|
As previously mentioned, there are important trends in system architectures that are leading to applications that require stronger device-level and system-level security. The advent of the SOC is now progressing to its next evolutionary step ” the platform SoC.
A POA device is a single design that is capable of taking on multiple personalities in post production. These personalities may incorporate multiple logic and analog functions that may be digitally activated and/or deactivated in post production to support multiple interface and feature configuration options.
While adding modest complexity and therefore unit cost to a design, the benefits of reduced NRE risk and virtualized SKU'ing bring strong competitive and economic advantages.
As these POA devices incorporate the configuration and management of premium product features and services, the requirement to secure these devices and the systems they support with an effective hardware root of trust becomes a critical requirement for today's system architect.
Craig Rawlings is the Sr. Director of product management at Certicom Corp., a RIM Company. Craig started his career at Hewlett Packard in 1985 and has since worked in executive high-tech marketing and sales positions for Kilopass, Actel, Resilience and Progress Software. Craig has published numerous articles and has earned a B.S.E.E. and MBA from Brigham Young University. Craig may be reached for inquiries at firstname.lastname@example.org .