Semtech Corporation has announced that 64GSPS ADC and DAC preliminary cores are available utilizing IBM’s 32nm SOI technology for integration in high performance System on Chip (SoC) solutions.
Targeting the requirements of Advanced Communications Systems including the optical communications, radar, and electronic warfare markets, these ultra-high speed data converters enable agile operation and concurrent multi-band / multi-beam operation as well as extremely high dynamic performance ideally suited for highly oversampled systems utilizing large instantaneous bandwidth at low power and small areas. The 32nm data converter cores are the first offering in Semtech’s roadmap of data converter cores. The Semtech roadmap includes a family of data converter cores in 14nm FinFET expected to be available end of 2015.
The ADC cores have an area of 4 mm2 and the DAC cores have an area of 2.2 mm2 . The cores include a wide tuning millimeter wave synthesizer enabling the core to tune from 42 to 68 GS/s per channel with a nominal jitter value of 45 femtoseconds root mean square. The full dual-channel 2×64 GS/s ADC core generates 128 billion analog-to-digital conversions per second, with a total power consumption of 2.1 Watts while the dual DAC consumes 1.7 Watts. The cores achieve 5.8 ENOB up to 10 GHz and SFDR greater than 43dB. In addition, the cores contain all necessary BIST and calibration eliminating the need for the user to develop sophisticated production test or mission mode calibration algorithms.
The cores are available to be licensed and used as IP cores. For more information, contact .