The SSB32 3-32 Gb/s stressed serial BERT solution from Centellax is intended for serial data test requirements for 100 Gigabit Ethernet (100GbE) standards. Its provides compliance testing for 4-32G Fibre Channel and InfiniBand EDR/FDR standards, as well as SerDes testing for communication ICs.
The SSB32 system contains a serial BERT controller (SSB16000 or SSB16000J) and full-rate pattern generator (PG32) and error detector (ED32) remote mountable heads. The SSB16000 provides a single tone of sinusoidal jitter (SJ) and the SSB16000J offers two independent sources of SJ along with broadband true random jitter sources.
The SSB16000J also allows all three clock outputs to be modulated with spread spectrum, with a deviation settable up to 1.0% of the clock frequency (10,000 ppm).
SSB32 provides full data rate pattern generation and error detection, an integrated clock source with calibrated stress capability, built-in selection of PRBS and common telecom/datacom test patterns and fully programmable user-defined patterns.
Remote heads place the signal very close to device under test and there is fully programmable generator output/detector input parameters as well as remote control through USB or GPIB.
Centellax Signal Integrity Studio graphical user interface software allows you to control any number of Centellax instruments in simple remote control use or sophisticated multi-channel measurements. The base software is available free of charge while the Jitter tolerance measurement package is an option enabled by a software key.