Sharing USB 3.0 links in embedded applications -

Sharing USB 3.0 links in embedded applications


A USB 3.0 port can be shared by splitting the link into a SuperSpeed port and standard USB 2.0 port. Currently Shared Link is a proprietary feature of the Cypress’ HX3 USB 3.0 hub controllers.  This article shows how to implement USB 3.0 link sharing in embedded applications such docking stations, notebooks, TVs, and set top boxes, among others.

The HX3 is a family of USB 3.0 hub controllers compliant with the USB 3.0 specification revision 1.0. The controller supports SuperSpeed (SS), Hi-Speed (HS), Full-Speed (FS), and Low-Speed (LS) operation on all the ports. It has integrated termination, pull-up, and pull-down resistors, and supports configuration options through pin-straps to reduce the overall BOM of the system. HX3 includes Cypress-proprietary Shared Link feature, which provides 8 downstream (DS) ports from a 4-port USB 3.0 hub.

Shared Link enables the USB 3.0 DS port of a hub to be split into an embedded SuperSpeed port and a standard USB 2.0 port. Shared Link enables a maximum of eight DS ports from a four-port USB 3.0 hub. Standard USB 3.0 port has 8 signal lines: two lines (D+, D-) for USB 2.0 communication, four lines (SSTX+, SSTX-, SSRX+, SSRX-) for SuperSpeed communication and two power lines for VBUS and GND as shown in Figure 1 below.

Figure 1. Standard USB3.0 Port (Source: Cypress)

The VBUS enable signal (DSx_PWREN) controls the delivery of VBUS signal to the attached USB 3.0 device. DSx_PWREN signal together with the overcurrent signal (DSx_OVRCURR) implements the overcurrent protection circuitry of the removable USB 3.0 port. When an overcurrent condition occurs in the port, the DSx_PWREN connected to the output enable pin of power switch turns off the port power.

USB 2.0 signal lines are required for backward compatibility. When a SuperSpeed device (USB 3.0 device) is plugged into a USB 3.0 port, communication happens only over the SuperSpeed lines and the USB 2.0 lines of that particular port are idle. Similarly, when a Hi-Speed device (USB 2.0 device) is plugged into USB 3.0 port, SuperSpeed lines are idle. Hence, in a USB 3.0 port, either SuperSpeed lines or USB 2.0 lines are operational at any given point of time depending on the device (SuperSpeed Device or USB2.0 device) connected.

Shared Link feature enables the USB 3.0 DS port to be split into 2 independent ports, one embedded SuperSpeed port and a standard USB 2.0 port, thus utilizing the redundant lines effectively. For example, if one of the DS ports is connected to an embedded SuperSpeed device, such as a USB 3.0 camera, HX3 enables the system designer to use the USB 2.0 signals of that specific port to connect to a standard USB 2.0 port. Figure 2 shows how Shared Link port can be implemented in a system.

In a Shared Link DS port, as the SuperSpeed port is embedded, backward compatibility to USB 2.0 is not required as the SuperSpeed device is permanently connected to the SuperSpeed port internally via a physical PCB trace. A Shared Link enabled system should not be connected to a USB 2.0 host or a USB 2.0 Hub. Since the Shared Link SuperSpeed DS ports cannot support USB 2.0 functionality (as expected by the USB 2.0 Host or Hub), the embedded devices connected to the Shared Link SuperSpeed port will fail.  

Figure 2. Example: Shared Link Port of Notebook PC Motherboard (Source: Cypress)

In a generic USB 3.0 port, the connected USB 3.0 device falls back to USB 2.0 speed when SuperSpeed communication fails for any reason. In a Shared Link port, this is not possible as the USB 2.0 lines and SuperSpeed lines are connected to two separate devices. Shared Link overcomes this limitation by implementing a separate VBUS enable pin (DSx_VBUSEN_SS) for the embedded SuperSpeed port (Shared Link port) in addition to the Power enable pin (DSx_PWREN) for the USB 2.0 port.  This helps to independently control the embedded SuperSpeed port power. HX3 identifies SuperSpeed communication failures and toggles its DSx_VBUSEN_SS pin connected to the VBUS detect pin of embedded SuperSpeed device. The DS embedded SuperSpeed device will start enumeration again considering this VBUS toggle as unplug disconnect and connect event. This is the unique implementation and specific to HX3’s Shared Link feature. Figure 3 shows the implementation of a Shared Link Port.

Figure 3. Shared Link Port (Source: Cypress)

Conventional Docking Station
Today’s portable devices are designed to be compact with minimum number of peripheral support. Ports such as serial, HDMI, Ethernet, etc. are usually excluded. To extend peripheral support, docking stations are designed to support additional ports such as USB, Serial, VGA, Ethernet etc. Figure 4 shows the block diagram of a conventional Laptop Docking station.

As shown in Figure 4, a conventional USB 3.0 docking station requires 6 to 8 USB ports (including embedded ports). They are mostly designed with cascade of two 4-port hub controller ICs. USB 3.0 hub is a mandatory requirement in docking stations for supporting high bandwidth peripherals such as Gigabit Ethernet and HDMI in addition to providing exposed USB 3.0 ports. Adding USB 3.0 Hub for connecting slower peripherals such as mouse, keyboard, serial etc is not cost effective. Therefore, conventional docking station needs to have both USB 3.0 Hubs and USB 2.0 Hubs. Two hubs in a system design increase the PCB area, power requirement, routing complexity and the number of passive components, increasing BOM costs significantly.

Figure 4. Conventional docking station design (Source: Cypress)

Shared Link Docking Station
On a 4-port HX3 using Shared Link, we can get up to 8 ports, four embedded SuperSpeed ports and four standard USB 2.0 ports. Figure 5 below shows an example of how Shared Link can be used to implement a cost effective Notebook PC docking station design. Cypress’ Shared Link feature provides a cost effective optimum solution to the customers compared to the Figure 4 Conventional docking station design docking station implementation.

Figure 5. Docking Station with a Shared Link enabled USB3.0 Hub (Source: Cypress)

As shown in Figure 5, downstream ports DS3 and DS4 are standard USB 3.0 ports and DS1 and DS2 are Shared Link ports. SuperSpeed embedded ports of Shared Link ports DS1 and DS2 are dedicated to high speed communication ports such as HDMI and Ethernet. Standard USB 2.0 Port available in the DS1 Shared Link port is used for adding RS232 port to the docking station. The exposed USB 2.0 Standard port available in DS2 extends connectivity to removable devices such as keyboard, mouse, mass storage devices etc.

Other Embedded Applications
The adoption of USB 3.0 has been increasing rapidly over the last few years. USB 3.0 host ports have become standard with all new PCs and notebooks. With the increasing demand for real-time HD quality video content, consumer electronics devices are also adopting the USB 3.0 standard. Shared Link can be used in most of these applications, including CPU motherboards, docking stations, display monitors, televisions, set top boxes, gaming devices, and medical devices, to name a few. 

The USB 3.0 standard supports 5-Gbps SuperSpeed (SS) operation – 10x faster than USB 2.0. This makes USB 3.0 ideal not only for interfacing high bandwidth peripherals such as HD camera, but USB 3.0 can also be used as a System Bus, allowing in-system connectivity between embedded devices as shown in Figure 6 .

Sharing linkings in an embedded application enables more devices to be connected to the USB host, reducing BOM cost, PCB complexity and power consumption.  In addition, it is always a challenge to maintain shorter trace lengths in embedded applications for SuperSpeed and HS signals as the DS ports are located on the edge of the PCB. The HX3’s flexible and programmable USB 3.0 and USB 2.0 PHY enables trace lengths up to 11 inches compared to the typically 6 inches that is supported.

Portable Computational Devices
In Portable Devices such as notebooks, tablets, and mobile phones, USB 3.0 is commonly used as an internal System Bus. As shown in Figure 6 below, the CPU IC usually supports a single USB 3.0 host. In this application, upstream port of the Hub is permanently connected to the embedded USB 3.0 host via a physical PCB trace. The DS ports of the hub may be connected to an embedded USB 3.0 capable IC or exposed as a generic USB 3.0 port.

Figure 6. Ultrabook PC design using two Hub controller ICs (Source: Cypress)

Figure 7 below shows how an Ultrabook PC design can share links to reduce BOM cost and design complexities.

Figure 7. Shared Link enabled Ultrabook PC (Source: Cypress)

USB 3.0 Docking Station Application
USB 3.0 docking stations can be classified into Universal Docks and Proprietary Docks.  The primary difference between Universal Docks and Proprietary Docks is the upstream connectivity of the docking station. The Universal Docks usually support a standard USB 3.0 upstream port, while the Proprietary Docks supports a custom interface specific to certain Notebook PCs.

Since Shared Link SuperSpeed port doesn’t have USB 2.0 lines, the embedded SuperSpeed devices connected to these ports will not function when docking station is connected to USB 2.0 hosts. Due to the risk of inadvertently connection to a USB 2.0 host, sharing links is not recommended for Universal Docks.

Schematic Consideration
Figure 8 below shows how to connect Shared Link signals to DS USB 2.0 device and an embedded SuperSpeed device.

Figure 8. USB data line connections of a Shared Link port (Source: Cypress)

Figure 8 has eight pins for USB communication,

  • Four pins (SSTX+, SSTX-, SSRX+ and SSRX-) for SuperSpeed communication and a power switch controlled VBUS pin,

  • Two pins (D+ and D-) for USB 2.0 communication and a power switch controlled VBUS pin.

The four SuperSpeed signals from HX3 connect to the SuperSpeed pins of embedded SuperSpeed device and the USB 2.0 pins of the embedded SuperSpeed device remains unconnected. USB 2.0 port connection of a Shared Link port is same as the standard USB 2.0 port.

A Shared Link Port in HX3 has the following pins associated with it:

  1. USB 2.0 Standard port pins

    1. D+ and D- lines for USB 2.0 Data transfer

    2. VBUS enable signal DSx_PWREN (shown in Figure 9)

    3. DSx_OVRCURR for over current indication to HX3 (not shown in Figure 8)

  2. Embedded SuperSpeed pins

    1. SSRX+, SSRX-, SSTX+ and SSTX- pins for SuperSpeed data transfer.

    2. VBUS enable signal DSx_VBUSEN_SS (shown in Figure 9)

As shown in Figure 8, USB 2.0 data lines (D+ and D-) are connected to removable USB 2.0 port connector pins and SuperSpeed lines go to SuperSpeed lines of embedded device. According to the USB specification, each removable DS port must have a minimum capacitance of 120 μF on the VBUS pin to maintain stable voltage under maximum load condition.  This is the reason why a 150 uF bulk capacitor is connected to VBUS_DS2 line. The bulk capacitor is not required on the VBUS pin of the embedded SuperSpeed port.

The USB connector shield (SHD1 and SHD2) should be terminated to GND with a parallel RC circuit to reduce the EMI as shown in Figure 8. 

Figure 9. DS Port VBSU Control in Shared Link (Source: Cypress)

The Shared Link mode requires a separate VBUS control for the removable USB 2.0 device and the embedded SS device. Figure 9 shows the VBUS control implementation.

To ensure that the embedded SuperSpeed device does not fall back to USB 2.0 operation, an external power switch is required. This switch is controlled by HX3, which generates an output signal called DSx_VBUSEN_SL. This signal controls the VBUS for the embedded device.

DSx_PWREN is another output signal generated by HX3 and controls VBUS for the removable USB 2.0 device. For example, when an overcurrent condition occurs, DSx_PWREN turns off the port power. DSx_OVRCURR  pin (not shown in Figure 9) is used to indicate the over current condition of a removable port. This pin is not required for the embedded SS port as this is permanently connected internally.

CY4613 is Cypress’ Shared Link Development Kit based on CYUSB3326 part.  The complete schematic of the Shared Link Hub can be downloaded from here.

Note that link sharing can be disabled if the developer doesn’t want to use the default configuration.  This is achieved by changing EEPROM configuration parameters and programming the modified configuration using the Blaster plus configuration utility. Cypress provides a Windows GUI tool called Blaster plus configuration utility to download the configuration to EEPROM through the USB interface of the PC. Refer KBA91657 for instructions on downloading firmware for HX3 and HX3 Blaster Plus User Guide for more details on the utility.

Sharing links can save on BOM cost in terms of component count and PCB area. For example, Table 1 below shows comparison of components used in a Shared Link based docking station design with conventional docking station design using two hub controllers. A design based on sharing links can save 28 components compared to the conventional docking station design. The area required for mounting these components also can be saved in a Shared Link design.

Table 1 Shared Link Docking station and Conventional Docking station comparison table (Source: Cypress)

For more details on sharing links, see HX3 Hardware Design Guidelines and Schematic Checklist or view the video “Introduction to Shared Link on HX3 USB 3.0 Hub Controller. The Shared Link Development Kit Platform CY4613 is available to evaluate a 6-port configuration. 

Gayathri Vasudevan is a senior applications engineer at Cypress Semiconductor, Bangalore. Gayathri is responsible for supporting customers on all wired USB products, developing specifications for next generation products, and creating solution demos, application notes and other collateral for new products. She has a degree in electronics and communication engineering.

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