Silicon Labs launches industry's smallest PCIe clock IC -

Silicon Labs launches industry’s smallest PCIe clock IC

Silicon Labs has launched what the company states is the industry’s smallest PCI Express (PCIe) compliant clock generator targeting consumer and embedded applications where reliability, board space, component count and power consumption are critical design factors. Designed to meet the specifications of the PCIe Generation 1/2/3 standards, the new Si50122 clock leverages Silicon Labs’ low-power PCIe and CMEMS technologies to provide an energy-friendly, crystal-less timing solution for a wide range of applications. d

The Si50122 is also the first clock generator to incorporate Silicon Labs’ patented CMEMS technology. The internal CMEMS resonator provides a stable frequency reference to the device’s CMOS clock circuitry, eliminating the need for a bulky, discrete quartz crystal. By leveraging CMEMS technology, the Si50122 PCIe clock provides the benefits of shock and vibration immunity, exceptional reliability and guaranteed performance under harsh conditions such as extreme temperature swings. Because handheld consumer electronics products are susceptible to being bumped or dropped, using a robust CMEMS PCIe clock generator rather than a crystal-based solution eliminates the risk of system failure caused by a broken quartz resonator.

The Si50122 is offered in a 2 mm x 2.5 mm 10-pin TDFN package, and the company states it is the industry’s lowest power crystal-less PCIe clocking solution. It uses a low-power “push-pull” HCSL output buffer, which eliminates the need for all external termination resistors at the HCSL outputs. By eliminating numerous external components, push-pull technology enables designers to create a continuous transmission line from the output pin to the receiver, resulting in cleaner signal integrity. Push-pull technology at the output buffer reduces power consumption by more than 60 percent compared to traditional constant-current technology used by almost all other PCIe clock suppliers.

The Si50122 PCIe clock provides two low-power 100 MHz differential HCSL outputs and one 25 MHz LVCMOS clock output. Since it is a crystal-less solution, it does not require an external 25 MHz frequency source. The Si50122 device exceeds the jitter requirements for the PCIe Gen 1/2/3 standards and supports optional spread spectrum modulation for electromagnetic interference (EMI) reduction.

Samples and production quantities of the Si50122 PCIe clock generator are available now. To accelerate PCIe application development, Silicon Labs offers Si50122-Ax-EVB evaluation boards priced at $125 (USD MSRP).

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