Siroyan DSP core ready for action - Embedded.com

Siroyan DSP core ready for action

The SRA328 is the first soft core from Siroyan in its family of synthesizable cores based on the OneDSP architecture. It provides a fully-scalable performance level from 400 to 3200MMACs at 200MHz enabling it to target a range of applications, from wireless communications to digital control and speech processing.

Siroyan is also releasing its complete tool chain for application software development, which has been developed with the architecture and SRA328 soft core.

The foundry-independent SRA328 will provide between one and eight execution-unit clusters in a single IP core – the actual number of clusters being determined by the designer when the core is instantiated.

According to Siroyan, on a range of DSP algorithms, such as FIR, FFT and Reed Solomon, a 4-cluster instantiation of the SRA328 running at 200MHz outperforms any other DSP at a given clock speed.

The scalability of SRA328 allows application platforms to be developed with different levels of performance and by re-using the same software. A single soft-core delivery can be re-used in many applications and extends the product life of the core beyond that of today's hard-core products.

As well as the number of clusters, SRA328 provides a choice of architectural configurations, memory subsystems and selectable, application-specific instructions. Each of these options can be selected using Siroyan's menu-based configuration system, which provides a range of performance points in the available design space, each of which is pre-verified in conjunction with the tool chain.

The core uses a 64bit AMBA bus as the on-chip interconnect, providing a high bandwidth connection to memory, peripherals and other processor cores, and an integrated DMA device for memory-memory block moves, which implements scatter-gather capabilities and is capable of bit-reversed addressing.

Also included is a debug interface, which connects via a Nexus 5001 interface to a debug adapter, offering Class 4-compliance at rates up to 100MHz. This allows remote debugging from a desktop host. Instructions for SIMD Galois Field arithmetic can be included in this core as an optional item. These are particularly useful for Reed-Solomon codes and certain encryption algorithms.

The OneDSP tool chain contains all the tools necessary to start programming a OneDSP-based application in C. It includes a customised port of the GNU C compiler for scalar code, and an optimizing C compiler for both scalar and VLIW code, which has been developed to harness the performance benefits of the VLIW features deployed in the OneDSP architecture; binary utilities, including an assembler and linker; the OneDSP XRAY debugger, licensed from Mentor Graphics, which allows full symbolic debugging of programs executing in a number of different target environments; an instruction set model that allows OneDSP executables to run on the host machine in the absence of target hardware; and the OneDSP configuration tool.

Published in Embedded Systems (Europe) May 2002

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