SOFTWARE TOOLS: Mentor unveils nextgen RTL-accurate TBX virtual emulation tool -

SOFTWARE TOOLS: Mentor unveils nextgen RTL-accurate TBX virtual emulation tool

Beaverton, Ore. – Mentor Graphics has just taken the wraps off the third generation of TestBench Xpress (TBX), which it claims has the only commercially proven RTL-accurate virtual emulation capability for eliminating traditional barriers to using hardware in-circuit emulation for system-level integration.

Designed to be used in conjunction with Mentor's Veloce family of hardware assisted verification products, TestBench Xpress provides a software based way to perform hardware-software co-verification for embedded systems.

The third generation of TBX version delivers megahertz-class acceleration compliant with IEEE's Standard Co-Emulation Modeling Interface (SCE-MI2.0).

It is architected based upon SystemVerilog Direct Programming Interface to deliver up to 10,000X performance improvement over the fastest software simulator without compromising interoperability and debug visibility.

It also provides backward compatibility with the previous generation standard ” SCE-MI 1.1. The new transaction compiler de-couples the software simulator from the high-performance Veloce family to accomplish an optimal mix of bandwidth andcommunication latency.

The new TBX comes with a series of productivity enhancement features to allow integration with existing functional models as well as high-levelarchitectural models coded in C/C++, SystemVerilog, or SystemC.

It performs streaming transactions to and from SystemVerilog based implementation using Transaction Pipes as mandated by the SCE-MI 2.0 standard. TBX completely supports both SCE-MI 1.1 and SCE-MI 2.0 standards. Various clock optimizations in TBX allow ICE- like performance and throughput in transaction based target-less applications.

In addition to its existing language support, this version of TBX also has newly added HDL and SystemVerilog language constructs that extends the support over and above synthesizable subset of SystemVerilog.

Language compliance with the SCE-MI standard, via a transactor linting mechanism that automatically checks the language compliance with the SCE-MI standard and generates detailed reports to facilitate development of performance optimal transactors.

The TBX is available either through purchase or time-based rental. The list price for TBX, which is an add-on option to Veloce, starts at $120,000. Supporting Linux and SuSE 10.0, the TBX is available now for production use.

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