LONDON Solido Design Automaton Inc. is expected to announce the general availability of a software tool suite it calls SolidoSTAT, on Monday (Sept. 17).
The tool suite builds on Monte Carlo analysis in an attempt to provide insight into how process variations affect the manufacturing yield of designs. If it lives up to claims made for it, the tool should allow chip designers make their designs more robust without over-designing.
Solido said the tool suite is applicable to analog, mixed-signal, digital and memory circuits.
SolidoSTAT, which comprises five individual software tools, has already been shipped to selected customers, Solido (Saskatoon, Canada) said, but did not reveal customer names or pricing details. The software runs on the Linux and Solaris operating systems.
Back in February 2007 the company disclosed how the technology would offer five basic capabilities; statistical sampling that describes how processes can vary, so that circuit simulators can estimate possible outputs; trade-off analysis that lets users adjust specifications to impact yield; statistical characterization showing the user how to improve the design to make it more robust to process variations; statistical circuit enhancement that automatically optimizes designs by sizing transistors; and statistical visualization that lets users explore and view the data. These capabilities are now encompassed in SolidoSTAT Sampler, Characterizer, Circuit Enhancer, Tradeoff Analyzer and Visualizer, respectively, the company said.