Electric motors consume a significant portion of global electrical energy. To a great extent, energy consumption of electric motors depends on motor and drive efficiency. To reduce this consumption, increase drive efficiency, and improve performance, regulators worldwide are imposing energy performance standards. As a result, electric motor drives are increasingly being deployed with high-accuracy, high-performance motor control algorithms.
It has become imperative for modern drive systems to integrate features such as control loop precision, scalability, network communication, peripheral control, data and design security, functional safety, and reliability. In addition, motors must be synchronized and controlled accurately without compromising performance and determinism, especially in multi-axis control systems. Such control and integration requires embedded designers to design drives that can not only run complex motor control algorithms, but also support communication with multiple peripherals in an increasingly connected environment.
MCU/DSP-based vs. FPGA-based motor control solutions
Designs for motor control applications have traditionally used a microcontroller (MCU) or digital signal processor (DSP) to run the control algorithms. But with the growing trend towards deploying high-performance industrial control systems that offer higher levels of integration, scalability, and re-usability of existing IP, FPGAs tend to be the preferred choice, especially when the solution combines an ARM Cortex M3 microcontroller and FPGA fabric, thereby providing an ideal division of labor for many key tasks.
There are several reasons for the growing adoption of FPGAs. First, while a microcontroller is ideal for slower-speed serial tasks because of its architecture and requirement to access memory for instructions, an FPGA fabric is ideal for parallel-processed functions that are more time-critical — for instance, multi-axis control where multiple motors at independent speeds are controlled by implementing deterministic control loops. Typically, multi-axis motor control systems also integrate functions such as peripheral control, sensor interface, protection logic/safety, and network communication. Tasks associated with each of these functions have different execution times and priority levels.
A microcontroller or DSP-based drive controller uses masking and ISRs for assigning priority levels for executing each of the tasks. Some unmasked tasks may get executed before the control loop, leading to non-determinism on the actual execution time for the control loop. In contrast, control loops in FPGAs and system-on-chip (SoC) FPGAs are executed in parallel to other processes and — in the case of multi-axis control loops — can also be run sequentially using time division multiplexing (TDM) schemes.
Table 1. MCU/DSP-based vs. FPGA-based motor control solutions
(Click Here to see a larger image. Source: Microsemi)
A flash-based SoC FPGA with an on-chip ARM Cortex-M3 microcontroller is even more effective: the FPGA is ideal to implement the control loops with tight, deterministic timing, while the slower-speed interfaces can be connected to the ARM M3 microcontroller (Figure 1).
Figure 1. Highly-integrated motor control solution implemented using Flash-based SmartFusion2 SoC FPGA (Click Here to see a larger image. Source: Microsemi)
Furthermore, FPGA-based solutions offer improved scalability and performance. As noted earlier, in an FPGA-based control implementation, tasks with lower priority have no impact on the execution of any control loops, so increasing the number of motors does not impact control loop execution time. An IP suite running on an FPGA can be scaled to drive from two brushless DC (BLDC)/stepper motor channels to a six-axis solution, or to extend motor performance beyond 70,000 RPM, depending on requirements.
In addition, it is possible with FPGA-based multi axis control to support higher pulse width modulation (PWM) switching frequencies in hundreds of kHz. In addition to integrating features such as PWM generation, FPGA-based motor controllers can also include embedded processing, dedicated blocks for controlling peripherals such as USB, PCIe, I2C, and CAN, multiple user-defined I/Os, and ready-to-use IP libraries with reference designs.
It is important to remember that the motor control algorithm is not the only required function. Often, one or more communications interfaces and control I/Os are required for a complete motor control design. These interfaces are not high-performance oriented and are ideal for a microcontroller such as an M3 to implement. The communication interfaces could be CAN bus, SPI, UART, or other control buses. An SoC FPGA provides a bridge between custom peripherals and the rest of the design, and a microcontroller-based SoC FPGA can be uniquely leveraged when additional peripherals are required. A modular IP suite also simplifies customization and scaling to support different combinations of multi-axis motors or high-RPM solutions, all while meeting evolving regional technology standards. The more compact the IP blocks (that is, less than 10,000 logical elements for the entire suite), the more headroom there is to support integration needs.
Reliability and security are two other important aspects of FPGA-based solutions. Avionics are especially important when designing systems for applications such as satellite solar panels, guidance, and control systems, medical scanners, nuclear plant machinery, and actuators and engine control. Many semiconductor components (including MCU/DSPs) are vulnerable to Single Event Upset (SEU) effects. The best choice for reliability and security is Flash-based (rather than SRAM-based) FPGAs. With all configuration information on-chip in non-volatile memory, they never expose the bit stream at start-up. An FPGA is also more reliable than a microcontroller for implementing motor control and network functions where deterministic timing is important. While there can be milliseconds of timing variability in a microcontroller, there are only a few nanoseconds of variability, or less, in an FPGA.
FPGAs also meet the security challenges of deterministic multi-axis motor control solutions. There is an ever-increasing threat that designs may be cloned, or that their data may be tampered with or stolen. Another threat to OEMs is the risk that their vendors or contract manufacturers possessing all required designs and IP will overbuild their product. Most of the available MCUs/DSPs may not offer the level of advanced security features that are inherent in FPGAs, which facilitate a layered approach to delivering hardware security, design security, and data security (the three key elements of a comprehensive security strategy).
Some Flash-based FPGAs can also serve as root-of-trust devices with the key storage capability to protect hyperconnected industrial IoT systems from malicious attacks. FPGAs address security needs with features like a physically unclonable function (PUF) from which the Private Key in a Public/Private Key scheme can be derived for implementing M2M authentication using a Public Key Infrastructure (PKI). Other features include cryptographic accelerators, a random number generator, hardware firewalls to protect CPU/DSP cores, and Differential Power Analysis (DPA) countermeasures that, together, allow security to be layered as needed throughout the system to protect the hardware and data.
The key advantages of an FPGA-based motor control implementation over an MCU or a DSP-based implementation are determinism, scalability and performance, reliability and longevity, and security.
- Determinism: In an MCU or DSP implementation, tasks are run sequentially with different execution times and interrupt-based priorities. The execution time of an ISR may not always be bound and, therefore, leads to non-determinism. In contrast, FPGA tasks run in parallel and the execution time of each task is deterministic and always produces deterministic outputs.
- Scalability and Performance: MCU/DSP performance is not optimal for multi-axis motor control at higher switching frequencies, as high-speed motors demand a high switching frequency (such as 500 kHz) and a ' => 2 µs ' FOC loop execution. MCU hardware architecture (PWM, ADC, and GPIO) has limitations on controlling multiple motors. With an FPGA implementation, advanced Field-Oriented Control (FOC) execution time is 1 µs, and TDM for FOC can be used to control multiple motors. Any I/O pin can be configured for PWM and ADC interfaces, and FPGAs can integrate multiple industrial Ethernet protocols, HMI, and other interfaces not supported on a typical MCU/DSP.
- Reliability and Longevity: MCUs and DSPs are vulnerable to single-event upset (SEU) and have shorter product life cycles. FPGAs are immune to SEU, have radiation tolerance in multiple applications, and typically have a life cycle over twenty years.
- Security: Whereas MCU/DSP-based implementations face tamper, cloning, and overbuilding risks, FPGA-based implementations are tamper-proof, secure boot, secure communication, and have a strong safety heritage.
Figure 2. SmartFusion2 dual-axis motor control starter kit (SF2-MC-STARTER-KIT)
(Click Here to see a larger image. Source: Microsemi)
It can be challenging for electric motor developers to meet today's energy efficiency mandates and new technology requirements while also ensuring that designs can scale to support different combinations of multi-axis motors or high-RPM solutions. Flash-based SoC FPGAs solve these challenges by combining processing power with a combination of hardware and software programmability and the ability to integrate new features and functionality, all while facilitating multi-layered security. These devices offer advanced features such as multi-axis control, deterministic response, parallel processing, functional integration, and flexibility, thereby enabling designers to reduce the total cost of ownership (TCO) of the system.
Aniket Athawale is Staff Engineer SoC Product Marketing, Microsemi Corporation (www.microsemi.com).