Network-on-chiip SoC IP vendor Sonics, Inc. has made a major upgrade of its SonicsGN on-chip network intellectual property (IP) that improves support for memory subsystems and provides higher performance with guaranteed bandwidth allocation across multiple system-on-chip (SoC) flows.
According to Drew Wingard, CTO of Sonics. the company has incorporated its patented, production-proven memory subsystem and non-blocking concurrency technologies from its MemMax and SonicsSX products into SonicsGN.
“These upgrades enable SonicsGN to support the latest DDR4 and LPDDR4 memories with highest performance and quality of service (QoS) for both compute and communication traffic on multi-core SoCs,” he said. With the improvements, SonicsGN fully supports the multi-threading capabilities of the Open Core Protocol (OCP) interface that reduce contention for and increase performance of SoC memory resources.
“Sonics’ scalable model for ensuring QoS, which has been used in production SoCs for more than a decade,” said Wingard, “is the most accurate and efficient approach to allocating resource bandwidth while ensuring low latencies.
Its QoS model assigns SoC traffic into three different classes: high priority, guaranteed bandwidth, and best effort; and optimizes memory subsystem performance based on the network traffic flow. SonicsGN’s target-based agent performance measurement is conducted as close as possible to the memory controller, which delivers greater throughput than on-chip networks that rely on more conservative, initiator-side approaches.
SonicsGN version 2.2 is available now.