MIPI M-PHY IP for next-generation high-speed interfaces based on the newly ratified MIPI Alliance M-PHY specification have been added to the Synopsys DesignWare portfolio. The DesignWare DigRF v4 Controller and M-PHY IP address demand for higher throughput in LTE and WiMAX mobile devices
This provides a controller and PHY IP for both the MIPI DigRFSM v3 (2.5G/3.0G) and v4 (4G) standards. Incorporating both standards in a mobile device brings the benefit of the faster 4G standards while preserving broad coverage by using 2.5G/3.0G as a fallback mode.
To address the growing usage of multimedia content in mobile devices, designers are using standards-based interfaces from the MIPI Alliance to help them meet the increased data throughput requirements for mobile terminals targeting 4G standard air interfaces.
The configurable MIPI DigRF V4 master controller and M-PHY hard macro are compliant to the MIPI Alliance specifications.
Synopsys believes that using a single-vendor solution enables designers to lower the risk and cost of integrating these MIPI interfaces into baseband and application processor integrated circuits (ICs), speeding time-to-market of advanced semiconductor solutions for LTE and Mobile WiMAX.
The DesignWare MIPI M-PHY implements all required physical layer functionality defined in the MIPI DigRF v4 specification. The DesignWare MIPI M-PHY is designed to meet the stringent power consumption guidelines of the MIPI M-PHY specification, keeping the energy expenditure below 15pJ/bit for typical LTE applications.
The integrated analog phase lock loop and biasing block are designed to help guarantee the integrity of the high-speed clocks and signals required to meet the strict timing requirements of the protocol. The DesignWare MIPI M-PHY also supports the optional dithering functionality defined in the MIPI DigRF v4 specification to further lower electromagnetic interference.
The DesignWare MIPI IP for DigRF v3/v4, CSI-2 and D-PHY are available now in 40nm process technologies.