Synopsys has introduced a silicon lifecycle management platform which it said is the industry’s first to provide data-analytics driven monitoring and optimization across the entire lifecycle of a system-on-chip (SoC), from design through to manufacturing and through the chip’s lifespan.
Increasing chip and system complexity, coupled with growing performance and reliability requirements, are driving the need for ongoing post-silicon analysis, maintenance and optimization. This, coupled with little tolerance for performance degradation of any kind and the need to meet functional safety and security requirements, means a new approach is needed to address how silicon-based systems are developed, operated and maintained.
The potential gains and cost savings in key applications like data centers and networking from improvements in performance and power could be measured in billions of dollars, according to Synopsys. These savings can be achieved by properly managing each phase of a chip’s and system’s lifecycle from development through deployment to ensure optimized results throughout.
This is what silicon lifecycle management (SLM) is meant to address. It is based on two principles: gather as much useful data about each chip as possible and analyze that data throughout the chip’s entire lifecycle to gain actionable insights to improve chip and system related activities. Synopsys said its SLM platform provides visibility and insight into critical performance, functionality, reliability, safety and security issues for the entirety of a chip’s lifespan. This enables the optimization of operational activities for all participants throughout the life of the SoC.
Synopsys said its SLM platform, tightly coupled with its Fusion design platform, will enable new levels of insights for both SoC teams and their customers and provide the ability to optimize operational activities at each stage of the device and system lifecycles.
The principal market analyst for ASIC and SoC at Semico Research, Richard Wawrzyniak, said, “Addressing critical chip performance and reliability issues is a multi-billion dollar issue that doesn’t stop at tape out. It requires a new way of looking at the entirety of how an IC is designed, built and used. Providing access to device data throughout the entire chip life span, and enabling on-going ‘in life’ feedback and optimization through specialized analytics will allow a more efficient and effective way to address the semiconductor-related quality and security challenges system companies face in all industries.”
Sassine Ghazi, chief operating officer of Synopsys, added, “Like so many other business domains today, the semiconductor industry now has the opportunity to further leverage empirical data about its products and technologies in order to achieve efficiencies across the electronics value chain, including at the system-level deployment stage. Building on our core expertise in IC design, our SLM platform provides a game-changing set of optimization capabilities that extend throughout the entire lifecycle of IC design, production and deployment.”
The SLM platform delivers two key capabilities that enable the ongoing lifecycle management of devices: data collection and detailed analytics.
First, non-intrusive monitors and sensors that are embedded throughout each chip gather as much useful data about each chip as possible. This provides visibility into all forms of circuit activity as well as environmental conditions like voltage and temperature.
Automated integration of the monitors and sensors into the RTL or gate-level design is provided through Synopsys’ TestMAX test integration solution which when coupled with the Fusion Compiler RTL-to-GDSII solution for synthesis and physical implementation, ensures the monitors are integrated while maintaining optimal power, performance, and area (PPA) design metrics. The SLM platform links TestMAX to Synopsys’ signoff analysis tools for guidance on where to optimally place the monitors and sensors.
Secondly, analytics on the chip data obtained from the monitors and sensors enable optimizations at each stage of the semiconductor lifecycle, starting with design implementation, and progressing through manufacturing, production, test, bring-up and culminating with in-field operation.
The SLM platform includes several targeted analytics engines. PrimeShield closes the loop on design implementation by utilizing both silicon data-based timing model calibration to minimize required margins as well as advanced analytics to further optimize design PPA, reliability and silicon predictability. The company’s SiliconDash semiconductor manufacturing analytics engine and the Yield Explorer design yield analysis engine use fab and test data enhanced with monitor and sensor data to optimize manufacturing and test operational efficiencies as well as improve overall yield.
The platform also features two additional analytics engines, an adaptive learning engine and an embedded learning engine, that enable optimized test bring-up and introduce self-analysis and predictive maintenance capabilities during the in-field operation of the chip.