Synopsys makes interface protocol development easier - Embedded.com

Synopsys makes interface protocol development easier

Synopsys has just introduced hardware/software Intellectual Property prototyping kits for 10 interface protocols, including USB 3.0, SSIC, PCI Express 2.0, PCI Express 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0 and JEDEC UFS.

According to John Koeter, vice president of marketing for IP and prototyping at Synopsys, the new DesignWare kits are designed to provide the essential hardware and software elements needed to reduce IP prototyping and integration effort by up to six weeks.

“As semiconductor companies face significant time-to-market pressures, increasing software content and more complex SoCs, they expect more from their IP providers to help them achieve their design goals,” he said.

The kits include a Synopsys HAPS-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic, a PHY daughter board, simulation testbench, reference drivers and application examples. The kits include either a host PC connection running the target operating system such as Windows, Linux, or others, or a DesignWare ARC processor-based 32-bit software development platform running Linux.

Koeter said the kits are configured to allow designers to modify the standard IP configuration for their target application through a fast iteration flow consisting of Synopsys' coreConsultant IP configuration tool, Synopsys' ProtoCompiler DX development and debug tool, and compilation scripts.

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