System-level verification objectives raise a concern that validation might only be possible after the design and drivers are mostly fully assembled and debugged but waiting for the design to be finished before checking compliance isn’t helpful either.
Computer-aided engineering, printed circuit board and multi-chip module, semiconductor intellectual property, and services all recorded double digit growth.
Synopsys Cloud will provide access to a suite of cloud-optimized design and verification products with pre-optimized infrastructure on Microsoft Azure, or customers can also bring their own cloud and access the EDA tools.
A roundup of this week’s embedded news includes podcasts featuring interviews with Joe Sawicki of Siemens post- DAC, and a report on the RISC-V Summit plus news of products, funding and people.
Many designers wanted a better integration with their existing desktop CAD tools, so SnapEDA, an online design library for CAD models of electronic parts, launched a desktop app.
New platform provides single unified cockpit to help system-level designers plan, implement, and analyze any type of stacked die system to give a full system view and perform system-driven optimization of performance, power, and area (PPA).
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