Cadence Design Systems has introduced a new tool that uses machine learning (ML) to drive the Cadence RTL-to-signoff implementation flow, delivering what it said is up to 10X productivity and 20% PPA improvements.
Community chip creation platform Efabless has launched chipIgnite, a program enabling low-cost fabrication of initial prototypes of intellectual property (IP) blocks or full systems on…
Siemens Digital Industries Software has been busy adding to its IC verification portfolio, with the acquisition of Fractal Technologies and OneSpin Solutions. The integration of…
With chip design becoming increasingly complex with multiple components and technologies coming together in hyper-convergent integrated circuits (ICs), a single system approach to analyzing the…
Automotive driving software and intellectual property company AImotive said it has successfully demonstrated automotive neural network vision applications executing at up to 98% efficiency on…
Katana Graph, a high-speed graph analytics startup focused on processing large unstructured data sets, announced it has optimized its graph engine for the new 3rd…
Cadence Design Systems has launched its next generation emulation and prototyping systems which it said offer the fastest and highest performance pre-silicon hardware debug and…
Siemens Digital Industries has added four new products in its Veloce hardware-assisted verification system which it said offer a seamless approach to managing rapid verification…
Electronic design automation (EDA) firm Pulsic has announced a plug-in for analog circuit designers that provides real-time chip layout previews in tandem with the schematic…
Amazon Web Services (AWS) said Arm plans to move the majority of its electronic design automation (EDA) workloads to the cloud, potentially increasing throughput by…
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