Designing a PCB with more than one antenna is not straightforward. This article highlights some of factors that affect the behaviour of antennas and their…
Cadence Design Systems has introduced a new tool that uses machine learning (ML) to drive the Cadence RTL-to-signoff implementation flow, delivering what it said is up to 10X productivity and 20% PPA improvements.
Dedicated audio edge processors with a focus on audio fidelity and with machine learning optimized cores are the key to providing IoT devices with voice user interfaces without the need for a high bandwidth internet connection.
Samsung Electronics has announced availability of its newest integrated 2.5D packaging solution, Interposer-Cube4 (I-Cube4), incorporating four high bandwidth memory (HBM) dies and one logic die…
Xilinx has taken a big step towards enabling wider market adoption of edge artificial intelligence (AI) and particularly embedded vision by entering the system on…
With chip design becoming increasingly complex with multiple components and technologies coming together in hyper-convergent integrated circuits (ICs), a single system approach to analyzing the…
Cadence Design Systems has launched its next generation emulation and prototyping systems which it said offer the fastest and highest performance pre-silicon hardware debug and…
RISC-V International and CHIPS Alliance have announced a joint collaboration to update the OmniXtend Cache Coherency specification and protocol, along with building out developer tools for…
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