A few key components step up to bat to play some big roles, without burning excess power.
Just when you thought you had every tool to perform a Tear Down, along comes a product with screws that befuddled my arsenal of screw drivers. To take apart the HTC Advantage X7500 PocketPC phone, I needed a Torx-3 screwdriver. Unfortunately, my set of Torx screwdrivers only went down to size 4.
Back to the subject at hand. To call the Advantage X7500 a PocketPC phone really doesn't do it justice. In reality, it's way more than a tri-band 3G/HSDPA and quad-band GSM/GPRS/EDGE phone.
It's much smaller than a laptop, more like a conventional PDA. But it offers much of the same functionality of the laptop. It gives you the ability to work on any Microsoft Office document, albeit on a less than full size keyboard. It's designed with a 5-in. (rather eye-pleasing) VGA touch-screen display, an 8-Gbyte hard drive, and a mini SD Card slot. The integrated GPS and TomTom Navigator 6 are also nice touches. HTC claims that the system gets “up to” 8 hrs. of battery life. It does that by paying close attention to power management, implementing various slow-down and shut-down modes.
The on-board 3.0 Mpixel camera combines with a second (VGA) camera, enabling the user to make video calls on a 3G network. Throw in the Wi-Fi and stereo Bluetooth 2.0 connections, and you can pretty much be connected any where, any time.
At the heart of the Advantage X7500 platform is an Intel XScale CPU, the PXA270. The graphics is driven by an ATI Imageon 2294 media processor (now part of the AMD portfolio). The 2294 IC handles parts of the audio and video processing functions related to the digital camera, camcorder, streaming video, and video telephony applications.
Chrontel's CH7013 is employed as the digital PC-to-TV encoder. It provides a universal digital input port to accept a pixel data stream from a compatible VGA controller and converts this directly into NTSC or PAL TV format, or at least that's what Chrontel claimed. Unfortunately, a conversion was required to display the data properly.
The CH7013's digital NTSC/PAL encoder offers a 9-bit DAC interface, an adaptive flicker filter, and a high-accuracy, low-jitter phase locked loop (PLL). All features are software programmable through a serial port, to enable a complete PC solution using a TV as the primary display, as is the case in the Advantage X7500.
Another significant piece of silicon in the computer is a CSSP based on an 8150 Eclipse II family of ultra low-power products from QuickLogic. Working in conjunction with the Chrontel TV-output device, the 8150 handles the required video manipulation. The CH7013 gets the LCD output from the Xscale processor. However, the TV encoder chip requires standard NTSC TV input. Because NTSC uses horizontal scan lines and LCDs use vertical scan lines, the LCD output must be converted to TV input. This conversion occurs in real time, where the address inputs are swapped so that the data displays correctly on a horizontal scan line chain.
In reality, the data is buffered to local memory, then output to a larger SDRAM, which has a direct connection to the 8150. Streaming occurs between the devices at a rate high enough to maintain 60 frames/s.
The 8150 also offers error correction and checking (ECC) in case any frames become corrupt or out of sync. The part actually looks at each frame, and if there's an error, it can skip ahead and grab the next frame.
This turned out to be a key component of the design, as data would occasionally get shifted at the output, causing the video to flicker. While the source of this problem was never actually determined, the ECC cleared it up. It could have been caused by noise on the board or timing issues.
Part way through the design, the HTC designers, who were based in Taiwan, realized that there were too many clocks (oscillators) on the board. When the QuickLogic engineers got wind of this issue, they came to HTC's aid, helping to reduce that number of clocks. For example, a 70-MHz clock was needed to run the SDRAM. That could be handled in the 8150, with a quick conversion. Hence, HTC didn't need an extra oscillator just to regulate the SDRAM.
There were some alternatives to the 8150, but each seemed to carry a tradeoff that the HTC designers weren't willing to make. For example, some of the other programmable devices offered more features, but they required more power. Or they could have gone to a more full-function decoder, but it came with more features that were required, hence higher cost.
Another alternative would have been to handle the X–Y swap in software. But the performance hit was beyond what the designers were willing to take, especially with the required frame rate.
The 8150 device includes the ability to selectively stop all display subsystem clocks and shut down the attached SDRAM, thereby reducing the system's overall power consumption. It also operates in a very low power (VLP) mode, whereby it enters a quiescent state, drawing just 2.2 µA at 1.8 V.
In VLP mode, all internal register and FIFO bits are retained, and the device can be “woken up” by the host processor within 250 µs. In operational (active) mode, the 8150 draws less than 30 mA at 1.8 V.
The host CPU communicates with the FPGA over the I2 C bus. Using this interface, the CPU can configure the design with the proper output timing and format, and configure the power management features.
The 8150 could have also been used to handle some of the connectivity. For example, the USB interface uses a legacy 1.1 connection. They could have easily upgraded to 2.0 with little added cost using the 8150.
There are also a pair of Xilinx CoolRunner II (2C128) CPLDs on the board to handle some of the control and glue logic. These parts offer 3,000 system gates and 128 macrocells.
Richard Nass is editor in chief of Embedded Systems Design magazine and editorial director of the Embedded Systems Conference. He can be reached at firstname.lastname@example.org.
QuickLogic Corp. “QuickLogic X/Y Swap Design for Simultaneous LCD and TV-Out Display in Handheld Electronic Devices,” white paper, 2007.