MONTEREY, Calif. Tensilica Inc. has announced the release of Xenery, an energy estimator that allows design engineers to cut power consumption in embedded systems. The software tool, which made its debut at the Globalpress Electronics Summit here Tuesday (Feb. 27), works only with Tensilica's Xtensa and Diamond Standard processors. It lets design engineers perform “what if” scenarios that help them slice power consumption in the media-rich processor technologies the company offers.
“For the first time, it is now possible to tune the hardware and software together to achieve energy-efficient processors,” said Chris Rowen, president and chief executive officer at Tensilica (Santa Clara, Calif.). “Xenery creates energy estimates quickly from a high-level description of a chip, showing the design engineer a variety of profiles describing how much energy each part of a chip expends, so engineers can fine-tune their designs.”
Tensilica's processors are typically used in such applications as cell phones, personal digital assistants, music and video players, set-top boxes, network protocol processors and dedicated wireless communicators. The company claims its software tool can cut the power consumption of any of its off-the-shelf synthesizable processor cores by 2x to 82x.
“Our new energy estimator can achieve an average of 25x better energy efficiency from any of our processors,” said Rowen.
During the configuration process, designers can use Xenergy to determine how the addition of options will affect energy consumption. Those options might include multipliers, floating-point units, DSP engines and designer-defined instructions, as well as input-output interfaces and memory subsystems.
“Too often, design engineers just use a static milliwatt-per-megahertz figure to estimate power consumption,” said Rowen. ” Now they can accurately estimate the power consumption of all their hardware and software components, said Rowen.
Xenergy is available now as a part of the Tensilica software development kit. The SDK includes the Xplorer design environment and all instruction-set simulators for its processor cores. The kit costs from $1,000 to $2,000 per seat.