Austin, Texas — Macraigor Systems LLC has upgraded its J-Scan debug and programming tool, giving IC designers visibility and control of every pin on chips that contain 32- and 64-bit embedded microprocessors.
The J-Scan version 2.1 boundary-scan tool communicates with the target with an interface that is compatible with USB 1.1 or USB 2.0. It is 10 times faster than the previous version. The new version also supports programming of devices with the serial peripheral interface flash interface, including FPGAs and other embedded devices.
The Boston-based company said the J-Scan tool gives designers the ability to observe in real-time the behavior of the pins of a chip packaged in a ball-grid array. The tool lets designers manually place the pins in any logic state.
Craig Haller, chief engineer at the company, said designers now can observe logic-state transitions and instruction addresses sent and received across individual pins, speeding the debug process for system-on-chip and other ICs and for new board designs.