Editor's Note: In designing deeply embedded systems, engineers face ongoing tradeoffs between power and performance. The rapid emergence of opportunities for personal electronics, wearables and Internet of Things (IoT) applications only exacerbates challenges in reducing power while enhancing performance. The ARM Cortex-M0 and Cortex-M0+ processors have emerged as a leading solution, providing the core for a broad range of microcontrollers designed to meet tough requirements for low-power, high-performance operation. In The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors, 2nd Edition, Joseph Yiu offers a comprehensive view of these processors. As Jack Gannsle wrote, these books will “…give you the insight you need to be productive on real projects.”
CHAPTER 19. Ultralow-Power Designs (Cont.)
19.2 Requirements of Low-Power Designs
There are many low-power microcontrollers on the market. Traditionally,
many microcontroller vendors classify their microcontrollers as low-power or ULP based on:
Active current during program execution
Idle current during sleep
Today, when selecting microcontrollers for low-power applications, designers should also consider:
Energy efficiency – how much processing work can be done with certain amount of energy.
Code density – how much program memory is need for an application. ROM (or flash) size requirement can have a significant impact on the system level power.
Latencies – how long would it take to wake up the processor from sleep, and how long it will take for the processor to complete an interrupt processing task? This can be important for some applications with real-time requirements that the processor might have to run at higher clock frequency to response to an interrupt request quickly.
In many applications, energy efficiency is the key for better battery life. If a microcontroller has lower active current but need several times higher number clock cycles to complete a task, overall it can burn off more power. As a result, the Cortex!-M processors have been very popular in low-power design as they offer excellent energy efficiency as well as high code density.
In addition to longer battery life, there are many other benefits for having energy-efficient processor in low-power designs. For example,
Smaller battery is required – enable smaller, more portable products
Low-power requirement might simplify the design of power supply, cooling
Might enable easier PCB design (thinner power tracks) and thinner wires inside products
Reduce the electromagnetic interference the microcontroller generates. This can be important to wireless communication product as it affects the quality of the wireless communications
Enable energy harvesting
Many of these factors can also have direct impact to product cost and product development time.
19.3 Where Does the Power Go?
To create better low-power design, it would be helpful if we first understand where the power is consumed on a silicon chip. We start by first looking into a photo of a microcontroller die with a Cortex!-M3 processor, as shown in Figure 19.4.
Figure 19.4. Die of a STM32F100C4T6B ARM Cortex!-M3 microcontroller. Wikipedia (http://en.wikipedia.org/ wiki/ARM_Cortex-M).
Note on Figure 19.4: Integrated circuit die photo of a STM32F100C4T6B ARM! Cortex- M3 MCU (microcontroller) with 16 KB Flash, 4 KB SRAM, 24 MHz CPU, motor control, and CEC functions.
While it is not clear where the processor is in the photo (it is likely to have merged with the digital logic on the upper right-hand side of the photo, which might also contains digital peripherals, DMA controller, and bus interconnect components), it is clear that the memory blocks (left-hand side) takes a significant space. The bottom right contains some nicely structured components. Some of these blocks could be the analog components (this chip has one 12-bit ADC and two 12-bit DACs).
And next to each of the I/O pads, there are also some transistors to help boosting the drive current and also components for protection and voltage level conversions.
Somewhere in the chip, there are also other clock-related components like three internal oscillators, an external Phase Locked Loop (PLL).
In general, the power consumption of a component in the chip is closely related to its area and its signal toggling activities (Table 19.3).
Table 19.3: Common elements that consume power in a microcontroller
Today we see many low-power Cortex-M microcontrollers with very sophisticated system features which enable longer battery life. For example:
Various run modes and sleep modes available
Ultralow-power Real Time Clock (RTC), watchdog, and Brown Out Detector (BOD)
Smart peripherals that can operate while the processor remains in sleep modes
Flexible clock system control features to allow clock signals for inactive parts of the design to be turned off.
While we will not be able to cover the details of all the low-power features in individual microcontroller devices here, we can cover some of the general concepts. Since different microcontrollers have different low-power features, if you want to fully utilize the low- power capability of the microcontrollers, you need to check out the details of the low- power features from reference materials or examples available from the microcontroller vendors. In many cases, example code could be available for download from the manufacturer Web site.
19.4 Developing Low-Power Applications
19.4.1 Overview of Low-Power Design Practices
In general, there are various measures that can be taken to reduce power consumption:
Reduction of active power
Choose the right microcontroller devicedOnce the basic system and memory size requirements of the project are clear, you can select a microcontroller with enough memory and peripherals but not too much more.
Run the processor at suitable clock frequency – Many applications do not require a high clock frequency. When a processor is running at high clock speed, it might require wait states due to flash memory access time and hence reduce the energy efficiency.
Choose the right clock sourcedMany low-power microcontrollers provide multiple clock sources including internal ones. Depending on the requirements of your appli- cations, some clock sources might work better than others. There is no general rule of “best choice” for which clock source to use. It entirely depends on the applica- tion and the microcontroller you are using.
Do not enable a peripheral unless it is neededdsome low-power microcontrollers allow you to turn off clock signals to each peripheral. In some cases, you can even turn off the power supply to certain peripheral to reduce power.
Other clock system featuresdSome microcontrollers provide various clock dividers for different parts of the system. You can use these dividers to reduce the power, for example, reduce the processor speed when the processing requirement is low.
Good power supply designdGood choice of power supply design can provide optimum voltage for the application.
Reduction of active cycles
When the processor is idle, sleep modes can be used to reduce power consumption, even it is going to enter sleep only for a short period of time.
Application code can be optimized for speed to reduce active cyclesdIn some cases (e.g., C compiler option set to speed optimization), it might increase code size, but when there is spare space in the flash memory then the optimization is worth trying.
Features like Sleep-On-Exit can be used to reduce active cycles in interrupt-driven applications.
Reduce of power during sleep
Select the right low-power featuresdA low-power microcontroller might support various low-power sleep modes. Using the right sleep modes might help you to reduce the power consumption significantly.
Turn off unneeded peripherals and clock signals during sleep. This can reduce the power consumption, but it might also increase the time required to restore the system to operation state after exiting sleep mode.
Some microcontrollers can even turn off power supply to some parts inside the microcontroller like flash memory and oscillators during sleeps. But doing this usually needs a longer time to wake up the system.
Most microcontroller vendors would provide code library and example codes to demonstrate the low-power features of their microcontrollers. Those examples can make the application development much easier.
The first step of developing a low-power application is to be familiar with the microcontroller device you are using. A few areas to investigate when developing sleep mode support code included:
Determine which sleep mode should be used
Determine which clock signals need to be remain turn on
Determine if some clock support circuits like crystal oscillators can be switched off
Determine if clock source switching is needed
19.4.2 Various Approaches to Reduce Power
There are several approaches for creating low-power applications.
Run the Application Quickly and Then Go to Sleep as Much as Possible
This is a very common approach to use. Sleep-mode supports are very common in modern microcontrollers and this approach allows a very good performance margin. So in case there are more interrupt requests arriving than usual, the system can still cope with the processing demand. The down side is that the peak current could be high, and you might need to enable and switch the clock to a fast clock every time the microcontroller wakes up, which could take some time.
Slow Down the Clock as Much as Possible
Many microcontrollers allow you to run the processor at a very slow clock rate, for example, using the RTC 32 KHz oscillator as the processor clock. This enables a much lower active current, and is suitable for applications that only need to deal with periodic tasks where latency to other requests is not an issue.
Power Down and Restart
Depending on the application requirements, some designers choose to power down the microcontroller and configure the microcontroller to wake up on certain hardware events. This can help getting the lowest idle power. But the time required to restart the processor can result in longer response latency, and the restarting process could also consume fair amount of energy.
Some microcontroller vendors include a state retention SRAM and firmware to help shortening the restart process. Firmware APIs could be available to store processor registers and states into the retention SRAM before power down, and the boot loader can then restore the information automatically so that the processor resumes from where it was in the application code. However, there could be some limitations, for example, some processor states like exception status (i.e., IPSR) might not be restored and therefore such power down feature might only be used in thread mode.
Some designers have investigated other approaches such as Dynamic Voltage and Frequency Scaling (DVFS) for microcontrollers (mostly academic research studies). However, DVFS is not suitable for some applications because in some microcontrollers, the clock outputs from on-chip PLL is unstable during switching and the PLL switching time could be too long to allow such system to deal with interrupt requests in real time. In addition, this method is unsuitable for many microcontrollers where the peripherals are operating on a clock derived from the processor’s clock and require a constant clock speed.
19.4.3 Selecting the Right Approach
The actual selection of the low-power approach depends on many device-specific factors and application-specific requirements. For example, if in your application it might have to deal with unpredictable processing loading requirements, then it is better to run the processor faster so that it can cope with occasional high processing demand periods, and get the system to sleep mode as long as possible. However, running the clock faster than needed can also have drawbacks:
Excessive power consumption on the oscillator, and potentially high power wastage in the PLL (if used).
Clock signals going to some of the peripherals could still be on all the time. If avail- able, consider utilizing some of the clock prescalars to reduce the clock speed of certain peripherals.
You can also consider running the clock in a medium frequency range, and only increase the clock speed when certain processing tasks (that require longer execution time) are executed.
In some applications, you could find that instead of using a PLL to get a high clock frequency, you can use a higher frequency crystal and use clock prescalar to reduce the processor’s clock to lower operating frequency when the work load is low. If the processing requirement increases, then reprogram the prescalar to increase the processor’s clock speed. This avoids the need to use the PLL (especially if the PLL is power hungry) and reduce the clock speed switching time (reprogram a clock prescalar is normally much faster than a PLL frequency switch).
In applications that the role of the processor is just to wake up periodically and do some processing, and the processing latency is not an issue, then running the clock slow could be one good way to reduce power. This is particularly useful for systems based on energy harvesting because it reduces the peak current to a minimum. However, there are some cases where running the clock as slow as possible might not able to save energy:
At low frequency range, the power consumption does not necessarily reduce linearly as the clock rate reduced due to leakage current, or active power of external compo- nents connected to the microcontroller. If the leakage current of the system is high, then running the system for longer can increase the power consumed due to leakage current. This is particularly true for microcontroller devices with memories that have high leakage current, or when certain analog components need to be turned on throughout the processing. If the leakage current is much lower during sleep, running the system faster and putting it into sleep mode longer might save more power.
There can be various limitations of frequency range and low-power characteristics of the oscillator and clock circuit designs. If the oscillator and PLL power consumption is significant and the power of these components cannot be able to reduce any further under certain frequency range, then reducing clock frequency further lower is not going to help.
Do not use a crystal with frequency lower than the specified frequency range stated by the microcontroller data sheet. Not only the crystal oscillator might not be able to startup properly, it might end up with harmonic in the oscillation which might result in an unreliable system and the oscillator could consume more power. It is also important to use the right capacitors with the crystal as stated in data sheet.
For applications that stay in sleep mode for extensive amount of time and if wake-up latency is not an issue, power down the design when the system is idle could be the best choice. In such case, care must be taken to reduce the power consumed in the start-up sequence. For example, a slow oscillator (e.g., 32 KHz) might take much longer time than a fast crystal oscillator to startup, therefore could end up with higher start-up energy consumption.
19.5 Debug Considerations
19.5.1 Debug and Low-Power
Depending on the microcontroller devices used, in some cases the sleep modes can disable all the clock signals or can disable the signal paths for debug connections. In such cases, if you are running a debug session on a debug host and such sleep mode is used, the debug session would terminate as the debugger can no longer talk to the chip.
In some other cases, you might find that when a debugger is connected, it disables certain low-power features so that the debug session can continue during sleep. However, the power of the system during debug will not reflect the real-world scenarios (it will be higher).
19.5.2 “Safe Mode” for Debug and Flash Programming
If you are using a microcontroller device that could terminate your debug connection during sleep mode, and if you are developing an application that could go into sleep mode fairly quickly after the system powers up, you could find that your microcontroller device get locked out from the debug connections after the program image is programmed. This is because the debugger does not have enough time to connect to the device before the sleep mode takes place (unless you can force the processor clock to run very slowly). This could also prevent you from updating the program image in the flash, because that also requires a debug connection.
For this case, you should consider adding a “safe mode” at the starting of the application so that the device will not go into sleep mode, or at least, not immediately when the safe mode is activated. Alternatively, the safe mode can force the application to use a sleep mode that does not disconnect the debugger. Such safe mode can be implemented by adding a simple status check on an input pin at start-up.
In some microcontroller devices, there are boot mode configurations and you can use that to enable flash programming instead of using a safe mode. However, the “safe mode” feature in the application is still useful for enabling debug operations.
19.5.3 Debug Interface and Low-Voltage Pins
Some microcontrollers can work at low voltage supply and this enables them to have very low-power consumption. However, some debug adaptors are not designed for low-voltage debug interface. As a result, you might need to increase the supply voltage for the development board during software development, or to get a debug adaptor that can operate at lower voltage.
Stay tuned for the next installment: Benchmarking of Low-Power Devices
About the author
Joseph Yiu is a Senior Embedded Technology Specialist at ARM Ltd. in Cambridge, UK. He joined ARM in 2001 and has been involved in a wide range of projects including development of ARM Cortex-M processors and various on-chip system level and debug components. In addition to in-depth knowledge of the processors and microcontroller system design, Yiu also has extensive knowledge in related areas including software development for the ARM Cortex-M microcontrollers, FPGA development and System-on-Chip design technologies. He received his BEng. in Electronics Engineering from City University of Hong Kong and an MSc. In Microelectronics Systems Design from University of Southampton.
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