There is nothing left to be invented in embedded control, Part 2 -

There is nothing left to be invented in embedded control, Part 2


“There is nothing new to be discovered in physics. All that is left is more and more refined measurements.” – Lord Kelvin, address to the British Association for the Advancement of Science – 1900 (disputed)

I am obviously paraphrasing this famous (although disputed) quote from Lord Kelvin, who was addressing the British Association for the Advancement of Science in the year 1900. One hundred and fourteen years later, it might seem like this quote could be applied to the world of embedded control. But this would be just sad, and, thankfully, it is far from the truth. There is plenty of innovation happening in embedded control, and it is occurring right now, in front of our eyes — in the 8-bit world!

In the first part of this short article series, we saw how 8-bit microcontroller cores are so small that relatively large CMOS process geometries can be used effectively to operate at higher voltages, drive higher current loads (up to 100 mA on selected MCUs) and to provide large margins of noise immunity, hence robustness. But, when it comes to processing speed, there is a clear disadvantage that they need to neutralize. The way they can do that is by changing the fundamental rules of the game, creating an arsenal of what we called the Core Independent Peripherals .

Core Independent Peripherals
The basic idea behind these new peripherals is that, once set up properly, they will operate independently and relieve the microcontroller core from the heavy lifting of the task at hand. This allows the use of a smaller MCU, operating at a lower clock speed, and idling (or even entering standby mode) for maximum cost, power and complexity reductions.

In the first part of this article series, we looked at the first two examples of core independent peripherals: the Signal Measurement Timer (SMT) and the Configurable Logic Cell (CLC).

The SMT proved to be useful in our example, helping to achieve a significant savings in power consumption via a reduction of the software complexity and required clock speed by as much as two orders of magnitude.

The CLC, by itself, was shown in the first example as an important tool for the reduction of power consumption in battery-operated applications by performing combinatorial and sequential input filtering. This produced a “smart” wakeup for an MCU that was otherwise spending most to all of its time in a standby (eXtreme Low Power) mode. More basic examples can be found in Microchip application notes such as “AN1450 – Delay Block Debouncer” and “AN1451 – Glitch Free Design.”

Reaching Deep
It would be very wrong if I gave you the impression that the CLC is just a tool for smart input filtering. Each CLC block has access to a large number of signals (16 to 32 in current models) that reach deep inside the microcontroller and its peripherals. These go far beyond the usual I/O structures connected to the device pins. They include most/all of the outputs from the timers, PWMs, and basic modules, as well as all the “other” core independent peripherals. In their turn, the outputs of each configurable logic block can be published on external pins or can be re-routed internally directly as an input (or trigger) of any of the peripherals available on chip.

Now things get really interesting because it is at this point that we can start building “new” peripherals by combining core-independent and traditional peripheral modules to perform new functions. These functions can be very specific and unique to the application and market segment, using what is otherwise an inexpensive family of general-purpose microcontrollers. Even more interestingly, because each CLC (connecting) block is configured at run-time via special function registers (RAM), the function of the new peripheral modules can change while the application runs.

Creating Custom Peripherals
As we did in Part 1, we will now review a practical example application where the core independent peripherals’ ability to be configured and combined together can be best appreciated.

Our example application will be a “smart” power supply of sorts. A low-cost, general-purpose microcontroller will provide the intelligence. While we won’t detail the control algorithm or topology of choice, this example will suffice for the purposes of our conversation, to specify that an output in the form of a PWM signal will have to be generated. Further, we will specify that the desired output frequency (Fout) be at least 500 kHz, to reduce component size and cost, and the output resolution will be optimized for maximum stability in a ±10% range around a set point centered at a 50% duty cycle.

As usual, when the problem calls for a PWM signal to be generated wereach immediately for the standard PWM peripheral and we try toconfigure it for the specific case. It turns out that a traditional PWMmodule will utilize the system clock of the microcontroller (Fcy = 16MHz in our case) and apply it to a timer/counter to compare it to aperiod register (PR). A second comparison with a duty-cycle register(DC) will provide the control of the output duty cycle. PIC16F1508/9 datasheet in hand, we will verify that the operating conditions are met with the following setting:

PR = (Fcy/4) / Fout  

DCres ≤ log2( PR) + 2           

resulting in PR = 8 for our choice input/output frequencies.

Notice how, although our PWM module of choice is capable of 10-bit resolution, the effective resolution available to us in this application will be: DCres ≤ 5 bit.

Thiscould be a bigger problem than you might think, as any controlalgorithm we will want to apply to our intelligent power supply willfind that, in the target resolution range (±10%), the effective numberof bits are further reduced to less than two. In other words, our powersupply will have only four possible valid PWM output values to use, toattempt and perform regulation. This is a sure recipe for disaster.Stability theory tells us that such a coarse control of the output callsfor an impossibly fast (read expensive) control loop, or for huge (andonce more expensive) output capacitors to reduce the entire systemdynamics. So, it would seem a low-cost microcontroller is quickly ruledout — unless we find a different angle to approach the problem.

Introducing the NCO
Allowme to introduce another core independent peripheral called theNumerically Controlled Oscillator (NCO). This is a deceptively complexname for such a simple and small module. Think about a simple counterthat is not dissimilar from any other timer/counter module, if only forone detail: Its count is not limited to steps of one but of arbitrarylength. An increment register (INC) can be assigned any desired value,and its contents are added to the counter register at each input clockcycle. Similarly to all other timers, the NCO continues to count untilit reaches a maximum value (determined by its size), at which point itproduces an overflow pulse (period output). Different from traditionaltimers, though, the NCO does not roll back to zero, but rather continuescounting up (adding the contents of the INC register) to the remainder value. This small difference is of great importance, when you consider the resulting behavior of the module.

Figure 1: NCO block diagram

For a given input frequency and increment value, the resulting output frequency will be:

Fnco = Fin * INC/2M   

where M is the number of bits of the counter register (often referred to as the accumulator )

Depending on the INC’s value, we will observe three possible interesting behaviors:

  • When INC = 2x , an exact power of two, there is no remainder and the NCO behaves as a divider of sorts: Fnco = Fin / 2(M-X)
  • When INC = 1, as a special case of the above (x=0), the NCO behaves as an M-bit timer/counter
  • When INC is not an exact power of two, the output frequency is a non integer ratio of the input frequency Fnco = Fin * Q, where Q = INC / 2M
    Notice how Q ≤ 1, as the increment register cannot be larger than the counter size.
    Because of this feature, similar peripherals have previously been referred to as fractional

Itis this latter mode that represents the most useful of the use casesfor the NCO module. Because Q is linearly related to the value of INC,we deduce that the output frequency can be controlled linearly, as opposed to traditional counter/dividers that provide a much coarser hyperbolic control by acting on the denominator of Q.

As a downside, the NCO will naturally produce a jitter inthe output period, as the accumulating effect of the remainder causesthe occasional periods to be shortened by one (and only one) clockcycle. In fact the remainder component changes at each period, andperforms a sort of automatic randomization/distribution of the outputfrequency.

On the bright side, an NCO can be used as a great(linear) frequency synthesizer as, at a given output frequency of say 1MHz, it can adjust the output in very fine-grained steps of just ±15 Hz.Obvious direct applications of this property can be found in radioapplications (see “A Receiver in a PIC MCU”), and also in dimmable Compact Fluorescent Lamp ballast and High Intensity Discharge lamp power supplies.

And, Now for Something Completely New
Aswe have seen in this short introduction to the NCO, it is clearlydifferent from a PWM module. In fact, we could perhaps say it is the opposite of a PWM module. A PWM module is designed to produce a fixed output frequency and to linearly control the signal duty cycle.

In contrast, the NCO is designed to produce a fixed duty cycle (a pulse, or 50%, if used to toggle an output) and to linearly control the output frequency!

If you’re with me thus far, you will probably enjoy the next twist in the plot, as I will now proceed to explain how we are going to turnthe NCO into what I just presented as its opposite. To do so, I willinvoke the help of two CLC modules and a traditional timer.

Wewill first turn the NCO into a one-shot circuit. This is accomplished bygating the input clock to the NCO module, with the output of a CLCblock configured as a flip flop and set by the same NCO output pulse.This way, the NCO is allowed to count up to each individual period, butwill stop as soon as the output pulse is delivered. The NCO incrementregister is now providing us with linear control of the one-shot circuitpulse (Ton).

Ton = 1/Fnco

Figure 2: Turning an NCO into a high-resolution PWM

Toturn this pulse into a periodic signal (resembling a proper PWM) wewill now need to restart the process on a fixed time base. But this iswhat traditional timers are good at, and we can combine one of them (setfor the desired output frequency Fo) with the one-shot by configuring,ad hoc, a second CLC block.

Figure 3: CLC configuration

A Very High Resolution PWM
The resulting module we have assembled now has some very interesting properties:

  • It operates on a fixed period (set by the traditional timer to the desired value of 500 kHz)
  • It provides (via the one-shot circuit) a duty cycle (Ton pulse) that can be controlled with a much higher resolution than the traditional PWM. In fact, it can be proved that the newly created module achieves an effective resolution given by the following expression:
    R = log2( INCset)
    where at the set (mid) point we are assuming INCset = 0.5 * 2N = 2(N-1)
  • where N = number of bits of the increment register

Ina practical application, we would have N = 16 and M = 20, which wouldgive us R ~ 15-bit. And, when further considering only the ±10% rangearound the set point, we would obtain an effective resolution of R ~13bit!

This is a significantly higher effective resolutionthan the bare two bits the traditional PWM modules could provide. Infact, this is such a large value that we can now relax thecontrol-algorithm timing requirements and reduce the output-capacitorvalues of our power supply without fear of losing stability.

Figure 4: A comparison table between a traditional PWM and our newly created High-Res PWM

Withoutthe NCO, similar performance would have required the use of advancedDSP processors with dedicated power-supply PWM modules, possiblyoperating at several GHz speed—all at a significant multiple of the costof the 8-bit microcontroller suggested in this article.

If weonce again take advantage of the MPLAB Code Configurator (a plug-in forthe MPLAB X IDE) to generate all the initialization code for us and toassemble the new custom peripheral, the actual code required to controlthe High-Resolution PWM is reduced to the example in Listing 1.

/* *    Example 2: Controlling the High-Resolution PWM  */ #include “mcc.h”void HRPWM_Initialize( void){   // initialize and connect the four peripheral modules    TMR2_Initialize();   // set PWM period     NCO1_Initialize();   // set duty cycle    CLC1_Initialize();   // connect peripherals    CLC2_Initialize();   // connect peripherals}#define SCALING  (2**20 / (PERIOD * 256))void HRPWM_LoadDutyValue( uint16_t duty){    NCO1INC = SCALING / duty;}int main( void){       uint16_t i;    SYSTEM_Initialize();    // init I/Os and peripherals     HRPWM_Initialize();     // assemble HighResPWM        while( TRUE)           // sweep    {        HRPWM_LoadDutyValue( i++);        DelayUs( 10);    }}

Listing 1: Sample code to initialize and control the custom HRPWM peripheral

Several more examples of combining the CLC with traditional peripherals can be found in the appendix reference list.

Divide et Impera
Tofurther increase the flexibility and efficacy of the core independentperipherals, the designers of the latest 8-bit PIC microcontrollers haveadopted a new strategy that increases the potential for assembling newand innovative peripheral-module combinations, by dividing them intosmaller and more distinct functions. For example, where a traditionalPWM module (CCP/ECCP) would once incorporate both timing generation andoutput sequencing (complementary-output and dead-band control) now thosetwo functions are offered separately. The PWM proper is stillresponsible for the basic timing, while the output sequencing is nowavailable separately as a Complementary Output Generator or COG module.The result is that the PWM which once generated square waves can now beused directly as a source by other modules (via the CLC), and thecomplementary output sequencing service is now available to any peripheral that requires it (via the CLC).

Anexample, borrowed once more from the intelligent power supply class ofapplications, would show a simple synchronous switching regulator (buck)topology implemented by directly connecting the output of a comparator(peak-current detect) to the COG module. (More on this in the nextinstallment.)

In summary, the “whole” is now bigger than the sumof the parts we started with, and the number of possibilities hasincreased exponentially.

The Programmable Logic Fallacy
Atthis point, pushing these concepts to an extreme, it would be temptingto deduce that we would be best served by a system where each module isdivided into the smallest possible logical unit (gates) and, as in aCPLD or FPGA, we had the ability to design every single element of thesolution from scratch, from the ground up. Unfortunately, despite muchfocus in the recent years, the cost and power-consumption limitations ofsolutions adopting such extreme approaches renders them prohibitivelyexpensive; not to mention the complexity and cost of the tools requiredto handle their design.

Core independent peripherals and theircombinations, on the contrary, can be mastered in minutes, and are foundin the most inexpensive and extremely low power devices availabletoday. They speak to the designers that have worked in theembedded-control space for decades, using a familiar language andparadigm.

But Wait, There’s More
The number ofcore independent peripherals has increased at a steady pace over thepast couple of years. As it would be impossible to list them all indetail, I will instead refer the reader to the Microchip Web page dedicated to the subject, and will proceed to a brief introduction of only a small selection based on purely personal preference…

TheHardware Limit Timer or HLT is essentially a re-triggerable timer. Itexposes to the CLC and other peripherals a reset input that allows thetimer to be restarted automatically without CPU intervention. Further,it can produce a direct output (pin/flag/interrupt) upon expiration. Themost common use is as a synchronous watchdog of sorts, or an automatictimeout for the activity of other peripherals.

ThisCyclic Redundancy Check module is defined to operate on configurable(up to 16-bit) polynomials, to satisfy most CRC algorithm standards. Itis designed to be used standalone or in combination with a flexiblememory scanner to perform very fast Flash memory checks, duringnormal CPU operation with minimal or no impact on its performance. Itsprimary use is in safety applications to assure UL or ISO Class Bcertification, while greatly reducing the CPU workload, timingconstraints and application code size.

TheZero Cross Detect module offers a clever solution to the problem ofmonitoring the status of a power line, while completely removing thedanger of substrate current injection. The result is external componentreduction, along with maximum on-chip analog signal chain performanceand robustness. Typical applications are found in many low-costappliances for sensing (safety) or phase-cutting (TRIAC) output control.

Angular Timer
TheAngular Timer offers the transparent conversion of angles (expressed indegrees) into a proportional time delay (clock cycles), based on agiven periodic input. It relieves the CPU from the need to performextensive math calculations (including multiplications and divisions in16 or 32-bit precision) reducing code size, removing look up tables, andsimplifying the application. Typical applications include motor controland various phase-cutting (TRIAC) applications.

To Infinity and Beyond
Aswe have seen, the power of the core independent peripherals ismultiplied when we connect them together—composing new, perhaps neverbefore imagined, functional blocks that relieve the CPU from potentiallylarge computational loads and real-time constraints.

In the nextand last installment of this brief article series, we will explore a fewmore examples of core independent peripherals; combining theirfunctionality with analog peripherals to create new“intelligent” analog solutions that achieve further simplification,along with reduced cost and power consumption.


  • PIC10F32X – a 6-pin microcontroller family featuring the CLC
  • TB3071 – VCO with Linear Frequency Response (using CLC and NCO)
  • PIC16F150X – a small pin count microcontroller family featuring several core independent peripherals, including: CLC, NCO, CWG
  • AN1476 – Combining the CLC and NCO to produce a higher resolution PWM
  • PIC16F161X – a small pin count microcontroller family featuring several core independent peripherals, including the SMT, ZCD, 100mA output drivers and Angular Timer
  • DS41631 – Tips and Tricks with the Configurable Logic Cell
  • ISBN: 97813129077759 – Di Jasio – This is (not) Rocket Science

Lucio Di Jasio isthe EMEA Business Development Manager for Microchip Technology Inc. Hehas held various technical and marketing roles within the Company’s 8,16 and 32-bit MCU divisions for the past 20 years. As an opinionated andprolific technical author, Lucio has published numerous articles andseveral books on programming for embedded-control applications.Following his passion for flying, he has achieved both FAA and EASAprivate-pilot license certifications. You can read more about Lucio’slatest books and projects on his blog at:

2 thoughts on “There is nothing left to be invented in embedded control, Part 2

  1. “Nice thing about MCU's coupled to, or implemented in, FPGA's, you can make any peripheral you can think of.ngood Article 🙂 -Lee”

    Log in to Reply

Leave a Reply

This site uses Akismet to reduce spam. Learn how your comment data is processed.