Is three the magic number for interconnect technologies?
In our embedded industry, standards seem to come and go. Sometimes those standards stick around for good reasons, sometimes not. And many times, the best solution from a technology perspective doesn't get off the ground. In many cases, the standard (or group behind that standard) with the most marketing muscle becomes the winner. We see this on both the software and hardware sides of the development equation.
It's nice to see that developers are starting to come to their senses and stick to the standards, at least more now than before. Mostly I'm referring to backplane interfaces, whether it's RapidIO, PCI Express, or Gigabit Ethernet.
Note that the original Ethernet specification was written more than 30 years ago, so it's safe to say that it has withstood the test of time. PCI Express is an offshoot of Intel's original PCI specification, which goes back better than 15 years. RapidIO doesn't have the same history as the other two alternatives, but nonetheless, it has some significant industry backing and should be a mainstay in the market.
Two recent announcements crossed my desk that attest to the need to limit the number of quality standards. In each case, the semiconductor vendor has said, “Enough already. We're going to support these three interfaces. If you can't make good with one of these, build it yourself.” Those are my words, but it's what I pictured the vendors saying.
The first announcement came from Altera, in the form of its Arria GX family of FPGAs. This low-cost family supports the three aforementioned architectures up to 2.5 Gbits/s. The low-cost part of that equation is a direct result of not trying to be “all interfaces to all development projects.” When I questioned the company's decision to limit the number of interfaces, I was told that by supporting these three, more than 60% of developers would be satisfied.
The second announcement came from Tundra Semiconductor. The company's Tsi384 is a four-lane PCI Express to PCI-X bridge, the first PCI Express bridge for a company that spends a lot of time trying to understand which architecture will be the interconnect of choice in the near future.
What architectures are left out of the equation, you ask? Certainly InfiniBand and HyperTransport come to mind. Obviously something has to give. There's room for multiple standards, but the actual number that can survive is not a large one. Is it three?
Richard Nass is editor in chief of Embedded Systems Design magazine. He can be reached at .