It is targeted at automotive system developers who want to move to the next stage in infotainment subsystems with the addition of high-integrity audio, simultaneous multimedia streaming and connectivity to external mobile and other wireless devices.
The DRA72x comes with anumber of media accelerator subsystems, including the IVA-HD video co-processor for decoding H.264 1080p resolution at 60 fps. This is sufficient to handle a number of simultaneous multimedia streams to be managed from within the infotainment system itself as well as from smartphones brought into the vehicle. In addition, the re is an integrated digital signal processor to run Acoustic Noise Cancellation (ANC), speech enhancement and audio post-processing.
This newest member of the Jacinto automotive SoCs incorporates two ARM cores: the main Cortex-A15 CPU as well as a Cortex-M4 to offload the from the main ARM Cortex-A15 many real time, interrupt intensive tasks, as well as management of vehicle connectivity peripherals including DCAN, Ethernet AVB, MOST Media Local Bus (MLB), PCIe, and USB2.0 and 3.0. The chip also works with TI's WiLink 8Q Wi-Fi, Bluetooth and GNSS combo connectivity family.
Like other members of the Jacnito 6 Eco family the new SoC gives developers access to a range of performance options from 2,800 to more than 10,000 Dhrystone million instruction per second (DMIPS).
Targeting mid-range next generation automotive models, the Jacinto 6 Eco' s integrated DSP also makes possible a simplified and cost-reduced multi-tuner radio solution for AM/FM/RDS, HD Radio, DAB, and/or DRM.