Tools to take an enhanced view - Embedded.com

Tools to take an enhanced view

ARM has revamped its RealView family of development tools with the addtion of a new in-circuit emulator (ICE), trace products and an upgrade to its RealView Debugger product. The tools will allow developers to optimize systems on chips for specific applications by looking more closely inside the system. ARM says that the RealView tools provide designers with the best solution for creating and analyzing systems based onthe companies technology. They are designed and used by the same engineers who created the ARM architecture. The tools are exposed to the highest level of pre- and post-silicon evaluation and development. The RealView development solution includes RealView compilation tools including C and C++ compilers, assembler and linker — available as a stand-alone package for the first time — RealView debug solution made up of the RealView Debugger tool, RealView ICE emulator and RealView Trace module boards and platforms including the Integrator family.The new version of the ARM RealView Debugger has been enhanced with addition of the RealViewICE emulator and the RealView Trace module. The RealViewICE emulator provides JTAG emulation for high-speed downloads (in excess of 600kbytes/s over JTAG @ 10MHz). This performance is enabled by host connections via Ethernet or USB. The optional RealView Trace module plugs onto the RealViewICE unit capturing information from the on-chip embedded trace macrocell (ETM), at data rates in excess of 200MHz. The resulting trace information allows the developer to identify difficult software/hardware interaction bugs and optimize performance. The new version of the ARM RealView Debugger has support for the ARM ETM solution, using the RealViewICE unit and RealView Trace module while also supporting users with existing ARM JTAG and Trace capture devices. The d ebugger addresses the evolution of systems to multi-core SoCs that contain both DSP and ARM cores on the same chip. Code running on multiple processors can be debugged in the same session using a single debug kernel, enabling independent or synchronized stop, start and stepping. The Debugger solution also supports the ability for breakpoint in one core to force a breakpoint in one or more of the other cores. Peripheral registers and memory values can be displayed in user configurable meaningful notation.Published in Embedded Systems (Europe) October 2002

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