Un-missable in-depth sessions target embedded design - Embedded.com

Un-missable in-depth sessions target embedded design


LONDON — The first day of the ESC UK conference on Tuesday 6th provides a series of in-depth technical sessions which should be unmissable for the real embedded systems developer. The morning will see four parallel sessions covering management, real-time developement and a presentation in the aerospace and military track.

The day kick off with a session on Managing Embedded Projects by Jack Ganssle who says that for all of the talk about technology, there is much too little said about managing the technology and managing the process of bringing an embedded system from concept to production.

This tutorial covers managing schedules, dealing with difficult developers, creating and managing project specifications and expectations, creating an environment where developers will thrive, managing bugs to dramatically reduce development time, fixing the feature/schedule/quality conflict, and learning from mistakes and successes.

Greg Davis, director of engineering for compilers at Green Hills Software will explore the guidelines for writing efficient C/C++ code. Attendees will learn how to write speed, power, and size efficient code for today's advanced compilers. The tips focus on coding and are compatible with any software engineering paradigm. Davis says that with ineffective programming, even a perfect compiler can not generate efficient code. This ninety minute talk will focus on the hows and whys of programming with today's modern compilers and how to get good performance out of them.

Examples will be given to illustrate how simple source code transformations can result in big savings regardless of the compiler used. The talk will cover choice of data types, variable scopes, the restrict keyword, floating point arithmetic, assembly statements, packing, loop optimizations, and volatile memory.

Designers looking to gain an understanding of a model driven embedded system design approach, key design decisions, advantages and challenges, potential design flows and tool option shouldn't miss the presentation by Ben Harding, AMRDEC, and R.C. Cofer, of Avnet.

Extended design life is often a key goal for aerospace and military designs. These designs utilize projected extended availability components with multiple sources when available. Implementation of a model driven embedded system design flow is another approach to extend a design's life cycle. Model driven design can support design updates and enhancements later in the design cycle and expand options for design function migration to new components and technologies as design elements reach obsolescence.

This class addresses model driven embedded design advantages and challenges, effective hw/sw partitioning, hw/sw co-design, DO-254 & DO-178C standards and implementation considerations. Evaluation and integration of system-level design tool options will also bediscussed.

The fourth morning session is presented by Jim Cooling of Lindentree Associates who will look at the fundamentals of analogue signal processing in microcomputer systems. Attendees will learn how the issues of data acquisition, signal generation and frequency domain analysis of analog signals affects the design of microprocessor systems.

There are two sessions starting at 12 noon. Glennan Carnie of Feabhas will discuss Understanding Quality and attendees will learn a pragmatic definition for quality and, more importantly, how to use this to guide your entire development lifecycle – requirements, design and testing.

Carnie says for practical purposes three definitions of quality are required, inter-related but very different; and not necessarilymutually-inclusive. This presentation identifies the need for different measures of quality, their inter-relationship, and also the business need for managing your – and your customers' – expectations of quality.

The second session from Matthew Hause, chief consulting engineer at Artisan Software Tools who will show how an integrated use of SysML and UML will improve communications, clarify requirements, enable trade-off analysis, and help to define hardware/software interfaces and integration.

The Systems Engineering Language. (SysML), is being increasingly used by systems engineers to model systems. As well as providing system requirements, SysML models can be used to define the system architecture to be used by the software engineers. This course will demonstrate how SysML and UML can effectively work together to provide an effective handover between systemsand software.

Wojciech Basalaj of Programming Research will ask “How good is your compiler at finding bugs?” and explain how understanding the strengths and weaknesses of compiler warnings provide additional benefits of dedicated static analysis know coding techniques to find defects at compile time.

Basalaj says it is a commonly held view that if C++ source code goes through a clean compile with all warnings turned on, it is good enough to be passed to a verification stage – test or code review. This assumption will be empirically evaluated for a range ofcompilers, with a dedicated static analysis tool serving as a benchmark. A review of coding techniques will take place, utilizing ISO C++ language constraints to shift some defect detection from run-time to compile-time.

Implementing a Memory Manager for Small Footprint Embedded Systems will be covered by Michel de Champlain, chief scientist at DeepObjectKnowledge. He will describe how to implement a memory management algorithm, its implementation and test suite in C suitable for a small footprint embedded virtual machine with tight memory constraints.

Memory is also the subject to be covered by Niall Murphy of Panelsoft Ltd. and during the session attendees will learn how to evaluate the memory management options available to them and look at alternative implementations of malloc and free. Learn how to locate the source of a memory leak.

This class looks at some alternatives that eliminate fragmentation and searches, such as fixed size pools. It examines how to measure and eliminate memory leaks. When there is a leak it is vital to identify the exact line where the allocation took place so that the bug can be fixed. This class looks at debugging code that can be inserted into your program to isolate the source of any leak.

The day will conclude with Jon Pearson of Cypress Semiconductor Corp. explaining how to add a touch interface to your product without ruining your life! Now that touch interfaces (touch screens, touch pads, touch panels) are widely available and robust and reliable and economical, every product that allows a human input must consider adding touch to their product. But a touch interface necessarily changes the product it is added to. The session will present 5 steps to follow as you adapt a product for a touch interface, from concept through manufacturing.

For more details see the ESC UK website.

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