Underpowering NAND Flash: Profits and Perils - Embedded.com

Underpowering NAND Flash: Profits and Perils


In recent years, computer systems ranging from sensor networks to portable devices to data centers have embraced flash-based solid- state drives (SSDs) to provide low power, light weight and shock resistant storage. These applications can expose flash memories to a range of stresses including unstable or unreliable power supplies that can underpower flash memories.

Flash-based SSDs have several characteristics that make unstable or unreliable power supplies particularly dangerous. For instance, an inopportune droop in supply voltage could corrupt flash translation layer (FTL) metadata and render the whole storage device unusable. If designers hope to implement reliable storage systems, they must understand the behavior of flash devices under these conditions.

This paper characterizes the behavior of flash memory devices when supply voltage droops unexpectedly during an operation. We show that supply voltage droops can incur errors for all operations. We also demonstrate that, for some operations, significantly reducing the supply voltage does not impact reliability. In these cases, we can exploit the chips’ tolerance for drooping voltages to save energy.

To characterize the behavior of flash memory chips, we developed a testing platform to repeatedly change the supply voltage to a raw flash device during read, program and erase operations. We examined 5 popular MLC chips from different vendors. Our data show several interesting behaviors of underpowering flash memory chips.

First, underpowering flash memory during an operation does cause data corruption in some cases, but not always lead to incomplete operations. Second, the minimum voltage each opera- tion requires to complete an operation without increasing the error rate is different. Third, underpowering flash chips can negatively impact the latency of operations but positively improve the energy consumption.

We used our characterization results to design a dynamic voltage scaling mechanism that adjusts the supply voltages to flash chips according to the type of operations. We can achieve up to 45% energy saving for the flash storage device without the assistance of any special data encoding scheme.

To read more of this external content, download the complete paper from the open author online archives at the University of California, San Diego.

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