Understanding MCU sleep modes and energy savings

Whether they’re used in smart meters, wireless sensor nodes, or mobile health monitoring products, microcontrollers (MCUs) are at the heart of almost every real-time application that demands prompt, predictable response to real-world events. In many of these applications the MCU relies on sophisticated sleep mode techniques that suspend most or all of its operations to minimize energy consumption, allowing it to run for years or even decades on limited energy sources. 

These real-time low-energy environments pose special challenges for the designer and programmer because the same sleep states that reduce an MCU’s energy consumption often also reduce its ability to quickly respond to an event. 

Low-power modes typically range from a light sleep or standby mode, through deep-sleep, to off (Figure 1 ). Each has a progressively lower level of CPU, memory, and I/O functionality as more peripheral blocks are switched off. The specific functionality of each idle, sleep, and deep-sleep mode varies from processor to processor but the fundamentals are the same. Generally, the deeper the sleep, the less power is consumed by the MCU. 

Figure 1 . Typical microcontroller sleep modes

Sleep is simple
The simplest mode for the designer to deal with is the sleep or standby mode. This enables a quick return to active mode, usually via an interrupt. But the cost for this level of responsiveness and simplicity is relatively high power consumption. 

In sleep mode, the MCU’s high-frequency clock oscillator remains running, but the clock tree that drives the CPU circuitry is disabled. This enables the CPU to resume executing instructions on the next clock cycle following the wake-up trigger. MCUs developed during the last decade employ extensive clock gating to cut off the clock signal to circuits that are not needed on any given cycle. This mode effectively provides clock gating across the entire CPU. However, the primary clock needs to continue to run to guarantee this level of response.
A number of advanced MCUs use on-chip phase-locked loops (PLLs), generally driven by a low-frequency quartz crystal, to generate the various clocks used by the processor core and other peripherals. For maximum energy saving these PLLs are best powered down when the blocks they drive are expected to be inactive. PLLs call for a constant current to maintain a lock. When starting up, it therefore takes time before the PLL is ready to provide a stable clock signal. 

In standby mode, the high-frequency peripheral clock trees are commonly kept active, allowing autonomous functioning of high-speed peripherals such as direct memory access (DMA), high-speed serial ports, analog-to-digital and digital-to-analog converters, and AES encryption/decryption. RAM remains active and can be accessed by the DMA controller, allowing data retrieved by peripherals to be stored without CPU intervention. The MCU’s pointer and configuration registers’ states are preserved, also to minimize delay.
 
When a processor core is fully powered down, its software state must be saved to memory – either battery-backed SRAM or flash. Restoration can take thousands of clock cycles as this state data is fetched from the backup memory. A lighter sleep mode may keep the PLLs running and the core registers powered, albeit at a lower voltage, to allow them to 'drowse' with a lower power draw than during normal operation. 

Power consumption in this mode can range from 45μA/MHz for an energy-optimized MCU to more than 200µA/MHz.

A deeper sleep saves more power
The next level is typically deep sleep, which leaves the MCU’s critical elements active while disabling high-frequency system clocks and other non-essential loads. In this mode the high frequency MCU oscillator is disabled but the oscillator used to drive critical peripherals is kept running. These may include the real-time clock (RTC) and watchdog timer as well as power-on reset and brown-out detection circuitry. 

Energy-optimized MCUs may add a number of other peripherals to this list to improve overall energy efficiency – for example serial ports, the touchscreen interface, LCD drivers, and USB bus controller. These allow the system to process I/O without waking the CPU core until absolutely necessary, so that it can sleep and save energy for longer.

Full retention of RAM and CPU registers allows the MCU to quickly return to active state and resume program execution. In this mode, power consumption can range from less than 1μA for an energy-optimized MCU to 50μA: a wide performance range means designers need to choose devices carefully. The time to return to fully active from this state can range from 5µs to 8µs.

Some MCU families offer a lower-power 'stop' mode that enables further power savings while retaining limited autonomous peripheral activity and fast wake-up. 
In this mode the high- and low-frequency oscillators are disabled but the state of the MCU’s pointer and configuration registers may be preserved depending on the tradeoff between static power consumption and wakeup time.

An advanced MCU able to take advantage of power-management circuitry can provide a current draw of just 0.59μA and still retain full register and RAM contents. For other MCUs the current consumption can range from 10μA to 30μA. The time to return to active mode will vary from only 2µs for the optimized design to 8µs. Again, the variations in specification are substantial; the designer can make substantial improvements by choosing the right MCU for the task.


Off mode – a ’near-death’ experience
The off or shutoff mode does completely power down the MCU but provides a 'near-death' state that preserves the minimum functionality needed to trigger wake-up from an external stimulus. The energy savings come at the cost of a significantly longer wake-up time. 

In this mode all functions and clocks are powered down except for interrupt monitoring circuitry on the reset pin and a GPIO wake-up pin (Figure 2 ). Restart requires a device reset or interrupt signal. The high frequency clock generator must power up and stabilize before the CPU can load memory contents from backup storage and execute its first instruction.

Figure 2. In near-death MCU power mode, all functions and clocks are powered down, except for interrupt logic. 

Power consumption can be as low as 20nA in this mode. However, some 32-bit MCUs will draw around 1.5µA. Wakeup time increases to around 200µs. 

Some MCUs include a small memory block that is retained even in this ‘near death’ state. This Backup Mode offers an attractive alternative to off mode because it preserves a few critical functions and enables much faster wakeup. Although it is typically used only if the main power supply fails and the system is on backup power, it can also provide a faster-wakeup alternative to off mode, allowing basic processing to resume quickly after restart, so that vital interrupts are serviced. The MCU can then return to sleep or allow normal state to be restored and execution to continue.

In this mode, with the RTC remaining active, some power-optimized MCUs are able to draw only 400nA. In this mode it would take roughly seven years to consume 11% of a 220mAh CR2032 battery cell.

Balancing the lifetime energy consumption equation
As with any equation, how sleep mode is used for a particular application is dependent on a range of variables. A number of strategies are used in projects to determine how these variables can be set to take best advantage of an MCU’s sleep modes. 

The first step is to identify the routine low-level functions required by the application and identify MCU architectures that can handle as many of them as possible using on-chip hardware that does not require CPU intervention. Besides the counter, timer, and RTC functions found on most MCUs, as noted above some advanced architectures have hardware to perform A/D conversions and data collection autonomously as well as monitoring alarm thresholds or a touchscreen input. They can even refresh and update an LCD. 

If the selected MCU can conduct memory transfers and other transactions between internal and external peripherals autonomously, it is important to make full use of such facilities. For example, an I2C bus transceiver or serial port that can autonomously receive and buffer packets to memory allows the MCU to remain in sleep mode until the arrival of an incoming message that requires action. Some MCU peripherals require external hardware or CPU intervention to manage a serial port effectively, which constrains the designer to use relatively high-power sleep modes to avoid losing incoming data. 

It often takes detailed analysis to evaluate the interactions between response time and the savings achievable from different sleep modes. However, tools are available to help work out how these interactions will play out (Figure 3 ) by providing an effective and inexpensive way of determining how different sleep strategies will affect the power consumption of an application and its performance. The key is first to know how the sleep modes function.


Click on imageto enlarge.

Figure 3. Power management tools can be effective in picking the right MCU sleep mode strategy

Run faster to save energy
Selecting a processor clock speed that is appropriate for your application is another technique that can be used to fine-tune both the design’s operating power and the time it spends in Sleep Mode. In many cases, the processor speed that results in the lowest overall energy use may not be the slowest clock speed (Figure 4 ).


  
Figure 4. Overall energy use versus clock speed. 

The idea of running a device faster to conserve energy may seem counter-intuitive, but a semiconductor’s energy consumption is the sum of its static consumption, which is present regardless of clock frequency, and its active consumption, which increases with operating speed. If we assume that doubling the clock frequency means cutting the time it takes the CPU to complete a task by half or more, the increase in dynamic power can be offset by the reduced processing time. This is because the static power consumption applies for a shorter period. 

Additional power savings can often be achieved by maximizing the transmission speeds of wired and wireless links. This is because physical layer communication interfaces often consume as much or more power than the MCU itself. Unless there are other considerations – such as longer link negotiation times at higher transmission rates – the transceiver’s power consumption can be minimized by insuring the processor’s clock speed is sufficient to allow it to handle data at the transceiver’s maximum available transmit/receive rate. As a result, running faster to sleep longer is often an effective energy-saving strategy.

Anders Guldahl  is an Application Engineer at Energy Micro, supporting customers, developing energy friendly code examples, and writing application notes. Anders also worked in Energy Micro's Simplicity team, designing development kits for the EFM32 Gecko microcontrollers, LESENSE peripherals and capacitive touch. He holds a Masters degree in control systems engineering from The Norwegian University of Science and Technology (NTNU) in Trondheim, Norway.

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