Use power-off protection for robust analog switch designs - Embedded.com

Use power-off protection for robust analog switch designs

Analog switches are used in portable handheld devices such ascellphones and PDAs, and consumer devices such as computers and videodisplays. Regardless of the application, system designers often findcases of non-zero signals on the switch inputs when power is notsupplied to the switch.

When subjected to input-signal overvoltage conditions, standardanalog switches are affected by unintended signal glitches (lack ofsignal-off isolation) and excessive current leakage. Deficit in offisolation can lead to system data-acquisition or processing problemsfrom unintended signals bleeding through the switch.

Current leakage – which is more serious than off-isolation – resultsin device failures and potential product returns. Today, specializedpower-off protection circuitry is available for new analog switchproducts, allowing switches to withstand over voltage conditions andassuring maintenance of signal-off isolation.

System defense
There are situations in which an analog switch is desirable for use toensure signal isolation when the switch is not powered. Aside frompower-up sequencing, other applications in which power-off protectionis desirable include hot-plug insertion, transient signal blocking andsystem-fault conditions.

In the power-up sequence case, some functional systems are poweredon before others. Often, this results from different voltagerequirements that cause multiple internal power rails. Generally, ananalog switch is powered with the highest supply rail available forbest performance.

This means that components using the lower V CC rail, such as system processors,are powered on before the next higher-voltage analog chipset. Forexample, if the analog switch routes control data and the GPIOcontroller is fully powered before the analog switch, the controllercan send a signal to the switch input before it has fully turned on.

The analog switch must be powered on to guarantee correctfunctioning based on its own control inputs. On a standard analogswitch, a positive data signal appearing on the switch input before ithas fully turned on does not guarantee correct signal handling.

Often, the system designer is aware of power-up timing mismatch andrelies on the analog switch to isolate input from output. However, thesignal can bleed through unless the analog switch has a specificcircuitry to guarantee off isolation in the power-off case.

Signal bleed-through results in false logic states, which derailssystem startup. Signal bleed through can even occur simultaneously onboth output pins of an SPDT switch regardless of OE and S pin states.

When the V CC pin is floating or is weaklypulled down, the switch input signal V sw powers up the switch's internalcircuitry, thus, signal bleeds through the switch ( see Figure 1a, below ). With theinternal V CC node (indicated as V sw -0.8V)powered up, the switch will turn on, pass the input signal and cause apositive voltage on the unselected output.

Figure1: (a) With a floating VCC pin, Vsw powers up and signalsbleed-through. (b) In an overvoltage condition, a typical analog switchexhibits current leakage.

For applications in which the analog switch is used as protectionagainst transient noise or fault condition, the switch is often at thesystem periphery to separate internal components from the outside. In afault-protection application, the switch also withstands such acondition for a long time (milliseconds).

When the positive input voltage is sustained, as in afault-condition or power-up sequence, it can irreversibly damage theanalog switch. This damage results from excessive current from theswitch input ports to a grounded switch VCC pin (Figure 1b, above ).

This current path results from the inherent switch-parasitic PMOSbulk diode acting like aforward-biased diode when input voltages are greater than VCC +0.5V.The diode requires a minimum forward voltage for conduction, which isabout 0.5V.

This diode allows excessive current flow through the chip and intothe VCC pin. The greater the voltage on the input pin, thegreater the current will be. This voltage-current relationship isexponential and is represented with an ideal-diode curve. As a result,the maximum current rating of the chip can be quickly exceeded.

Once a part is damaged from an overvoltage event, the part will mostlikely exhibit excessive leakage and may not function even with inputsreturned to normal operating conditions.

Robust design
Switches with power-off protection have unique circuitry that preventsunintended signal bleedthrough and guarantees system reliability duringan overvoltage condition. When VCC = 0, the switches willisolate input signal from outputs regardless of the state of the enablepins or select pins, thus preventing unintended signal bleed-through.

It will also protect against current leakage from the signal pininto the supply pin. The input signal will have high-impedance inputwhen the switch is powered down, preventing any parasitic PMOS bulkdiodes from being forward-biased. It is important to note that unlessspecified, power-off protection is on one port and not on both sides ofthe switch.

On first-generation power-off protected switches, protection hasbeen added to the common pin because this port often sees an overvoltage event. The system designer must carefully read the datasheetfor proper switch con- figuration and protection against anticipatedthreats.

A system designer will likely inquire on how power-off protectedswitches run in a powered- up system in which an input signal isgreater than VCC . For example, the switch is powered by VCC = 2.8V and Vsw = 3.6V. In this case, the power-off protectedswitch will not protect the system from excessive current leakage to VCC ,thus, datasheet absolute maximum ratings must be observed.

In a typical switch, Vsw can exceed VCC by0.5V. However, any voltage in excess of 0.5V should be avoided, as itcauses reliability failures.

In the example, the VCC supply should be increased toequal the maximum value of the switch input signal. If this is notpossible, VCC should be within 0.5V of VSW . TheSPDT switch will ensure that the unselected output will not have anysignal bleed-through.

The selected output will still pass the full value of the inputsignal. Referring to the case just described, if VCC wereincreased to 3.3V, Vin of 3.6V would pass through to theselected output.

Futurepower-off protected switches will further increase this range,allowing the switch input swing to exceed VCC to a maximumlevel regardless of the VCC supply. 

In the meantime, a simple schematic work-around solves thisproblem. Inserting a 100 ohm series resistor between the switch VCC pin and supply rail can protect the switch against damage during apowered-up overvoltage condition.

The 100 ohm resistor limits current flow back into the VCC rail to a safe operating range. Finally, datasheet limits always applywith regard to maximum over voltage conditions in both cases, whetherthe parts are powered up or down.

Travis Williams is Sr. Applications Engineer at Fairchild Semiconductor.

To read a PDF version of thisarticle, go to “ Power-offprotection for robust analog switches.”

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