Using advanced equalizers and cable assemblies in 20 meter copper communication links - Embedded.com

Using advanced equalizers and cable assemblies in 20 meter copper communication links

Recently, there has been considerable amount of work in standardizing Cu (copper) cable links in communication systems.  They have shown up in standards such as SFF8431, IEEE802.3ba, FC-PI-4, SFF8461, FC-PI-5, and IEEE802.3ba.  A common question is how far a link could go on a passive Cu cable.  Traversing within a single data center rack only requires 3-5 meters of Cu Cable.   Going from rack to rack could potentially lead you to link distances up to 20 meters. 

This article explores the latest technologies in Advanced Equalizer Integrated Circuits, and Advanced Cu Cable assemblies in order to study the problem of closing a passive Cu Cable link of 20 meters long. 

Some history

Passive Cu cable assemblies have been and are heavily used in the data center. Traversing ports within a typical data center rack do not require cables longer than 3 meters.  Traversing ports from one rack to another could potentially require longer cable lengths.  Depending on some cable routing conventions, even longer cables are needed. 

Some system vendors are looking at closing communication links up to 20m long between racks in a data center.  At data rates of 1Gbps, the loss and distortion are still small enough to be handled by conventional host chips and standard cables for most applications.

As Serial data rates continue to increase with several industry initiatives pushing 10Gbps speeds, distortion and loss increase significantly.  Many of these new standards are including specifications for passive Cu cable assemblies, such as SFF8431. High-speed Cu cable assemblies typically include high loss and high distortion that collectively contribute to significant signal channel degradation.    


Using traditional host integrated circuit chips, and standard Cu cable assemblies one could expect to close a link of a passive Cu cable of about 3 meters.  For any longer distances, new technologies need to be leveraged.
 

With the advancement of equalizer integrated circuits, and higher signal integrity Cu cables, the possibilities of reaching longer distance links on Cu at 10GbE have become a reality.  In this article, we look at the latest technologies to show the viability of closing a 20m passive Cu link at 10GbE.  Our goal was to use a combination of currently available standardized transmitter, receiver and cable assemblies that would give us the longest distance.

On the host chip, two technologies can be leveraged for longer cable reaches.  In terms of the transmitter, the most powerful standardized 10Gb Ethernet equalizing transmitter to minimize distortion would be the 10GBASE-KR transmitter.  The 10GBASE-KR transmitter is defined in the IEEE802.3ap standard.  It has a larger output amplitude compared to other standardized transmitters seen at 10GbE, such as the SFP+ transmitter. 

The larger amplitude helps with the voltage budget, as will be discussed later in this article.  The KR output driver also has the added benefit of a pre-cursor equalization tap in addition to it’s post cursor tap.  This transmitter has a 3-tap finite impulse response architecture, which can be leveraged to equalize the highly distorted long Cu cable. 

In terms of the receiver, the most powerful 10Gb Ethernet equalizing Receiver would be the 10GBASE-LRM receiver.  This receiver is defined with an Electronic Dispersion Compensation (EDC) engine, which enables a self-adjusting mechanism to deal with signal quality variations. The EDC architecture utilizes waveform equalization through FFE (Feed Forward Equalization) and DFE (Distributed Feedback Equalization) blocks. 

Details of production IC chip transmitter and receiver implementations and lab results will be described in further detail in this article.  High-end circuits like 3-tap FIR transmitters and EDC receivers can recover error-free data from what appears as a completely closed eye when using conventional oscilloscopes.

Regarding cable assemblies, several advancements in technology have helped increase Cu cable link reach.  Improvements are seen in cross-talk, less loss and distortion per meter of cable, passive equalization to minimize distortion, and shielding design changes to help reduce signal integrity issues for longer cables and higher data rates.   All these improvements combine into an enhanced Cu cable that helps extend the link’s distance.

This article will discuss the advancements of the latest technologies from cable assemblies and host chips with 3-tap FIR transmitters and EDC receiver technologies, then delve into a study on closing a 20m Cu cable link at 10GbE utilizing these latest technologies.

Latest Hardware Technologies

As applications are going to higher data rates while trying to maintain the same Cu cable lengths, we see more distortion and signal attenuation at these higher nyquist frequencies.  Advanced equalization has been introduced in many 10GbE standards to enable these applications.  These powerful equalizers redefine what is perceived as “good” or “compliant” waveforms for these applications at the end of the stressed channel. 

The traditional view of a system consisting of a limiting reference receiver defines a “good” waveform based on an open data eye.  In the case of an EDC (Electronic Dispersion Compensation) reference receiver, a completely closed eye could be a “good” waveform because the EDC has the capability to open up closed eyes.  


The EDC, shown in Figure 1 below , is a receive equalization architecture consisting of feed forward equalizers (FFE) and decision-feedback equalizers (DFE).  It is capable of opening closed eyes adaptively.


Figure
1 :  EDC Architecture

The FFE is a tapped delay line structure.  A weight setting for each tap, shown as wfn in Figure 1 where n is the tap number, determines whether the signal at that tap is amplified or attenuated.  Each tap then recombines at the summation node.  The input rate is S/T where T is the bit period, and S is an integer that equals the number of input samples before one FFE output.  Typical applications have S equal to 2.  The delay lines are defined to have a delay of T/S between each tap.  The output rate of the FFE is 1/T, or the bit rate. 


The distributed feedback filter (DFE) is also a tapped delay line structure.  Its input is the clock-recovered decisions made from the FFE equalized summation node output.  The delay between each tap is T in contrast to T/S in the FFE.  The feedback taps also have weight settings, shown as wbn in Figure1 where n is the tap number.  These taps feed back into the summation node.  
 


The FFE structure is able to cancel inter-symbol interference (ISI), but usually enhances noise in the process.  In contrast, the feedback filter is used to cancel ISI while minimizing noise amplification.

The output of the FFE and DFE goes to an error channel that utilizes an algorithm to optimize the weight settings for each tap. 

There are many adaptive algorithms that could be used (e.g. Least Mean Square, and Zero-forcing).  This optimization of tap weights creates a customized frequency response filter to counter the affects of the stressed channel input waveform.

 
Equalizers have advanced in the latest standards.  In IEEE802.3ap, the 10GBASE-KR equalizer was initially modeled as a 1 tap FFE and 5 tap DFE equalizer, also notated as a (1,5) equalizer.  In IEEE802.3aq, the 10GBASE-LRM equalizer was modeled as a (14,5) equalizer.  This “LRM” equalizer has been the most powerful equalizer standardized thus far for 10Gb Ethernet. 

Advanced Transmitter De-Emphasis Overview     

The 10GBASE-KR variant in the IEEE802.3ap standard introduced a 3-tap finite impulse response (FIR) Transmitter in section 72.7.1.10.  This equalization structure delays each tap by 1UI (unit interval).  Each tap can either amplify or attenuate that signal.  The 3 taps are then summed together.


Figure 2:  10GBASE-KR Transmitter Architecture consisting of 3-tap finite impulse response equalizer.  This is found in IEEE802.3ap Section 72.7.1.10.

 
This architecture allows for equalization for both post cursor and pre cursor type distortions.  
 


Cable Construction Advancements

Equalization on host chips is not is not the only advancements in technology.  Passive Cu cable assemblies have improved recently as well.    The SFF8431 SFP+ Appendix E defined the Passive Cu Cable link utilizing the 10GBASE-LRM equalizer. 

The specifications for the cables in this appendix caused many cable vendors to redesign their PCB paddle boards and terminations in order to be compliant to such parameters as VMA to cross talk ratio, and the parameter dWDP found in the SFP+ standard SFF8431.    


Insertion Loss per meter has improved as well.  The older “standard” cables were specified at about 2.1dB per meter at 5GHz.  Now newer “enhanced” cables are ranging insertion loss from about 1.7dB per meter.  On the two 20 meter cables used in this article, we were seeing 43dB nyquist loss on the standard cable and 35.5dB on the enhanced cable. 

Assuming 1dB loss per paddle card on each head, we were seeing about 2.05dB loss per meter on the standard cable, and 1.675dB loss per meter on the enhanced cable at nyquist.  Over the 20 meters, that’s about 7.5dB less loss at 5GHz.   

The shielding in a cable in the past typically had a suck-out on the insertion loss graph around 7GHz.  For shorter link distances, this suck-out was not a big concern.  For longer cables of 20m and/or going to higher data rates, it becomes a larger concern. 

The traditional shielding on a cable assembly was to use a “spiral wrapped” shielding cable.  This creates a discrete shunt capacitance that is repetitive over the transmission line, therefore creating a low pass filter.  This filter is the cause for the 7 GHz suck-out typically seen in these “spiral wrapped” cables.

A solution to this suck-out was to use a uniform “Cigarette wrapped” shielding on these cables.  This type of shielding would eliminate a discrete repetitive capacitance, and therefore the 7 Ghz suck-out would be eliminated.

Another innovation was the use of passive de-emphasis implementations within the cable assemblies.  Two ways to accomplish this would be either a passive network on the PCB boards, or by using different conducting materials in the cable to create de-emphasis by taking advantage of skin effects. The de-emphasis would attenuate the low frequencies in order to improve the distortion coming out of the cable.  One must keep in mind that the distortion improves while trading off low frequency output swing levels.

Between improved designs for crosstalk isolation, shielding to improve suck-outs, and de-emphasis used to improve distortion, cable assembles have advanced in the recent years.  These improvements make it easier to reach farther link distances at 10Gb Ethernet data rates.

Link Budgets

When considering a system with a Cu cable link, one needs to account for two link budgets to ensure the system link closes.  There is a voltage budget, and a distortion budget. 

The voltage budget is restricted by the receiver’s sensitivity limit at the far end, and the transmitter’s output with de-emphasis on the near end.  SFP+ (SFF8431), and Fibre Channel (FC-PI-4) has implemented a check on this voltage budget through a term called VMA (Voltage Modulation Amplitude).  VMA is defined as the amplitude of a waveform using a pattern of alternating 8 zeroes and 8 ones.    


This essentially is the low frequency amplitude.  These standards guard-band a minimum amount of low frequency amplitude that needs to be present for the EDC Receiver to meet minimum sensitivity requirements.  
 


There is also the distortion budget  allowed in the time domain.  Equalization is required to minimize the distortion by applying the negative or inverted distortion.  Equalization essentially trades off low frequency voltage amplitude to minimize the distortion.  

When both voltage and distortion budgets are satisfied, then the resulting waveform is equalized and error free at the receiver’s slicer (decision circuit).


Figure 3:  Block Diagram of Lab Setup using a Host IC 10GBASE-KR Transmitter

Setting up the lab for tests

In the lab, we used a 10G BERTScope Pattern Generator, with a PRBS31 standard pattern at 10.3125 Gbps data rate.  The BERTScope had the DPP module added for 10GBASE-KR output transmitter, giving us the option to use either the host IC transmitter (Figure 3 above ) or DPP transmitter (Figure 4 below ).  


Figure 4:  Block Diagram of Lab Setup using the BERTScope DPP 10GBASE-KR Transmitter for high non-compliant output swings of 1400mVpp
 


Using a matched pair of SMA cables, the output of the pattern generator was attached to the Vitesse host IC VSC824X.  Matched pair of SMA cables from the VSC824X 10GBASE-KR transmitter attached to the SFP+ Host compliance board.  A variety of Cu Attached cables were plugged into the host compliance board. 

On the other side, another Host compliance board is mated to a VSC824X EDC Receiver host IC.  Then the output of the Host IC is connected to an error detector on the BERTScope.  The BER is measured at the error detector.

Two Transmit output swings were used:  1000mV and 1400mV differential p-p.  The 1000mV was done with both the VSC824X transmitter output (Figure 3 ), and the BERTScope’s DPP transmitter output (Figure 4). 

The 1400mV output amplitude was only done with the BERTScope’s DPP module (Figure 4).  The 1400mV differential p-p output from the transmitter is a non-standard output for KR, but was utilized in order to study the voltage budget.  It was useful to bring up the amplitude in order to evaluate the distortion budget independent of the voltage budget.

The transmitter setup had the main tap set to maximum, pre-cursor tap remained fixed with -11.7dB de-emphasis, and the post cursor tap was varied according to the spreadsheet in Table 1 and 2. 



Figure  5:  Transmitter Output Waveform with an 8 zeroes 8 ones repeating pattern to show Pre and Post Cursor Settings

Figure 5 above and Figure 6 below of a waveform and data eye capture, respectively show the transmitter’s pre and post cursor settings for trial 5 later in Table 1 and Table 2


Figure 6:  Transmitter Output Eye for Trial 5

Results of the lab tests

13 different trials were conducted and recorded.  Transmitter output swings were measured at Point B, and link Bit Error Rate (BER) was measured at the end of the link at the BERTScope Error Detector (Figure 7 below ).   



Figure 7:  Point B and Point D on the Setup block diagram

Table 1 below shows the lab data taken for trials 1-8 which show the link BER for different post cursor emphasis settings on enhanced and standard cables.


Table 1:  Lab Data Trials 1-8 comparing Enhanced vs. Standard Cables

Table 2 below shows trials 1-5, and 9-13 which show all enhanced 20 meter cable with an output transmitter amplitude of 1000mV or 1400mV differential p-p while varying the post cursor emphasis setting. 


Table 2:  Lab Data Trials 1-5 and 9-13 comparing transmitter output swing 1000mV vs. 1400mV

Observations

There were 2 types of cables used in the lab:  standard and enhanced.  Standard is the typical cable we have seen in the previous years for 1GbE, 2G Fibre Channel, and 4G Fibre Channel with about 2.1dB loss per meter and spiral wrapped shielding.  The enhanced cable is the cable developed for the latest standards, including the advancements in lower insertion loss of about 1.7dB per meter and cigarette wrapped shielding.

The enhanced cable performed better than the spiral wrapped cable as expected.  Error free at 20m occurred with the enhanced cable in trial 3-5, and 9-13.  The standard cable’s bit error rate for 20m cable appears to hit an error floor at about 6.00E-6 BER as a function of post cursor emphasis as seen in Figure 8 below

The enhanced cable improves with less post cursor emphasis, showing the receiver’s sensitivity is affecting the link for higher emphasis.  This voltage budget limit is shown in Trial 1 and 2.  In Trial 3-5 we are error free, but as we de-emphasize the low frequency from 150mV p-p down to 100 and 50mV pp errors are introduced out of the Receiver.  Therefore it appears looking at observation 3 and 4 that the voltage budget has been violated here.


Figure 8:  Post Cursor Emphasis (dB) vs. Bit Error Rate at end of link Chart on 20m cables with Transmit launch outer eye opening of 1000mV.  Less emphasis yields better link BER on enhanced cable due to voltage budget considerations.

To evaluate the distortion budget independent of the receiver’s sensitivity effects (voltage budget), we raise the Tx output to 1400mV differential p-p output amplitude in trials 9-13 using the BERTScope DPP module. 

One can see that the De-Emphasis value between 6dB to 16.48dB yielded an error free result with the 20m enhanced cable.  This shows that the VSC824X 10GBASE-LRM Receiver has wide margin w/ the 20m cable to handle a 10dB variation of distortion.  Therefore, one would expect the same result with respect to distortion for the 1000mV differential p-p Tx output.

Trial 5 is a repeat of trial 4, with the DPP transmitter replaced by the VSC824X transmitter.  This trial ran for over 20 minutes error free ( < 8.08E14 BER) showing margin to the typical industry standard of BER 1e-12 requirement. 

This article did not deal with cross talk or longer host channel considerations.  Further study is required to investigate these affects on the system.

 
Conclusions

Much technological advancement has taken place at 10Gbps data rates.  The new technologies discussed on the host IC and the cable assemblies combined work together to extend Cu cable link distances.  20 meter passive Cu cable solutions have been searched by system vendors, and this article shows a path to a solution. 

In summary, finding the optimal combination between the host transmitter, passive Cu cable assembly, and the advanced equalizer Receiver, leads us to the 10GBASE-KR transmitter, the 10GBASE-LRM EDC receiver, and the enhanced Cu attached cable assembly. 

With this combination, we close a 20m Cu cable link with a BER  < 8.08e-14.  We see at least 10dB margin in the distortion budget, which we can trade-off with the low frequency amplitude (voltage budget) to extend FR4 channels. 

(George Noh , Senior Systems Engineer at Vitesse Semiconductor Corporation, is responsible for product definitions through simulations, lab measurements, and involvement in standards such as SFF8431 SFP+, SFF8461 Cu Direct Attach Cables, 8G and 16G Fibre Channel, and IEEE802.3ba 40/100G.  George holds a B.S.,M.S.E degree from the University of California, Los Angeles. )  

Latest Hardware Technologies

As applications are going to higher data rates while trying to maintain the same Cu cable lengths, we see more distortion and signal attenuation at these higher nyquist frequencies.  Advanced equalization has been introduced in many 10GbE standards to enable these applications.  These powerful equalizers redefine what is perceived as “good” or “compliant” waveforms for these applications at the end of the stressed channel. 

The traditional view of a system consisting of a limiting reference receiver defines a “good” waveform based on an open data eye.  In the case of an EDC (Electronic Dispersion Compensation) reference receiver, a completely closed eye could be a “good” waveform because the EDC has the capability to open up closed eyes.

The EDC, shown in Figure 1 below , is a receive equalization architecture consisting of feed forward equalizers (FFE) and decision-feedback equalizers (DFE).  It is capable of opening closed eyes adaptively.


Figure
1 :  EDC Architecture

The FFE is a tapped delay line structure.  A weight setting for each tap, shown as wfn in Figure 1 where n is the tap number, determines whether the signal at that tap is amplified or attenuated.  Each tap then recombines at the summation node. 

The input rate is S/T where T is the bit period, and S is an integer that equals the number of input samples before one FFE output.  Typical applications have S equal to 2.  The delay lines are defined to have a delay of T/S between each tap.  The output rate of the FFE is 1/T, or the bit rate. 

The distributed feedback filter (DFE) is also a tapped delay line structure.  Its input is the clock-recovered decisions made from the FFE equalized summation node output.  The delay between each tap is T in contrast to T/S in the FFE.  The feedback taps also have weight settings, shown as w b n in Figure1 where n is the tap number.  These taps feed back into the summation node. 

The FFE structure is able to cancel inter-symbol interference (ISI), but usually enhances noise in the process.  In contrast, the feedback filter is used to cancel ISI while minimizing noise amplification.

The output of the FFE and DFE goes to an error channel that utilizes an algorithm to optimize the weight settings for each tap. 

There are many adaptive algorithms that could be used (e.g. Least Mean Square, and Zero-forcing).  This optimization of tap weights creates a customized frequency response filter to counter the affects of the stressed channel input waveform.

Equalizers have advanced in the latest standards.  In IEEE802.3ap, the 10GBASE-KR equalizer was initially modeled as a 1 tap FFE and 5 tap DFE equalizer, also notated as a (1,5) equalizer.  In IEEE802.3aq, the 10GBASE-LRM equalizer was modeled as a (14,5) equalizer.  This “LRM” equalizer has been the most powerful equalizer standardized thus far for 10Gb Ethernet. 

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