Loop stability analysis usually starts from an open-loop Bode plot ofthe plant under study such as the power stage of a buck or a flybackconverter. In this situation, the designer can extract phase and gaindata within the frequency range of interest.
The designer's job is to identify a compensator structure, whichwill lead to the selected crossover frequency affected by the rightphase margin. The final step requires the study of the total loop gain,the power plant and the compensator, showing that the poles/zerosplaced on the compensator ensure stability once the loop is closed.
If this operation is rather straightforward with single loops, theoperation becomes more complicated with converters implementingweighted feedback. This article capitalizes on the work done with loopstability analysis techniques and explores different ways to apply thethem to power converters featuring multiple feedback paths.
|Figure1: Shown is a TL431 classically wired in a type-2 configuration.|
For example, a power conversion circuit (in this case the TL431 )can be modeled as a multiple loop feedback system. Figure 1 abov e shows a TL431classically wired in a type-2 configuration. From Figure 1, one canidentify so-called slow and fast lanes.
The loop gain of such a system could be measured by breaking theloop at the feedback point on the primary side (e.g. at the optocouplercollector). Unfortunately, depending on the converter configuration,this solution can sometimes be difficult or hazardous to implement.
|Figure2: An LC filter is often inserted between the fast and slow lane inputsto remove unwanted high frequency spikes|
The best is then to measure the loop gain from the secondary side.However, on some applications, an LC filter is often inserted betweenthe fast and slow lane inputs, added there to remove unwanted highfrequency spikes, typical of a flyback converter (Figure 2 above ). Because of thisconfiguration, we can see that the AC stimulus would split between thelanes, leading to a wrong result.
Fortunately, we can apply the superposition theorem as we aredealing with a linear system. At first, we will sweep the slow lanewhile keeping the fast lane to a bias level, totally disconnected fromthe output voltage. A DC voltage supplied by an external source will do(Figure 3 below ).
|Figure3: The fast lane is AC disconnected from the circuit and only the slowlane receives a stimulus.|
The precision of the 5V source is not relevant here as it onlyserves bias purposes. The AC source actually represents an injectiontransformer, classically used in loop stability studies. The A and Bprobes go to a network analyzer, which will compute 20log10 (B/A), displaying a loop gain equal to G1 (s)/sR2 C1 .
Once the plot is saved, the configuration needs to be changed to theother input (Figure 4 below ).In this circuit, the upper R2 terminal is connected to a DC voltagewhose value must equal the regulated voltage, whereas the fast laneinput is now AC swept.
|Figure4: The fast lane is now AC swept as the slow lane is simply DC biased.|
The DC adjustment might be a little difficult given the open-loopgain brought by the TL431 and the sensitivity on the external bias. Thenetwork analyzer still computes 20log10 (B/A) for the fastlane. But this time, it plots a loop gain equal to G1 (s).
Once we have both slow and fast lanes loop plots on the screen, how dowe combine them? Can we just sum up the gain and phase diagramsexpressed in dB and degrees, respectively?
Certainly, we can't. It would correspond to cascaded gain blocks andnot paralleled paths. We need to vector sum both output signals andreconstruct the final signal that expresses the combination of bothloops. Using Euler notation, we can express the slow lane signal by arotating vector affected by a module A1 and a phase Phi(1) 1:
Using a similar notation, we can write the fast lane expression:
To reconstruct and plot the final gain curve combining both signals(the signal observed on the feedback pin once all loops are closed), weneed to separate the real and imaginary portions of the two lanes andsum them together:
The rotating vector obtained at the end will be of the followingform:
Where we can now extract a module and an argument:
From these two equations, plotting 20log10 of the firstequation and the phase returned by the second equation should give usthe Bode plot we are looking for.
|Figure5: The schematic of the 19V/3A adapter features a UC3843 with a TL431on the secondary side.|
To check the validity of our assumptions, we built a 65W powersupply based on a classical UC3843 controller. The internal op amp isdisabled via a pull-up resistor connected to the reference voltage. Figure 5 above shows the adoptedschematic diagram.
We will first start by sweeping the slow lane, while the fast laneis biased to 19V (output voltage value) with a DC voltage source (Figure 6 below ).
|Figure6: The slow lane is individually biased while the second loop is AC|
The injection voltage source is implemented with a widebandisolation device and a 33 ohm resistor. Voltage probes are used tomeasure the loop input and output signals with respect to ground. Thenetwork analyzer directly computes 20log10 (ChB/ChA).
The slow lane loop gain starts with a -1 slope because of the originpole formed by (Rupper = R12 + R10 , Czero = C6). The power stage pole fp is around 20Hz and corresponds to:
where Rload is the output load resistor and Cout is the sum of C5a and C5b . After f p ,the power stage gain decreases with a -2 slope until it reaches the8kHz pole formed by (Rpullup , Cpole ) of our type2 compensator
Now that we have the slow lane loop plot, we can pass the networkanalyzer data to Excel. We have a three-column data table with thefrequency (Hz), magnitude (dB) and phase (degrees). Using Eulernotation, we will calculate the real and the imaginary part of the slowlane vector:
Excel will compute the following formulas:
The Excel syntax corresponding to these equations are:
To perform slow lane measurement, we have to run the same operationfor the fast lane loop. We inject the AC signal in the fast lane whilethe slow lane is disconnected from the output voltage and biased with aDC voltage source.
This DC voltage must be manually adjusted to fix the operating pointcorresponding to the output load used. As the TL431 is very sensitiveto small voltage variations, we can use a resistor between the DCsource and the resistor divider to adjust the output voltage(Figure 7 below ).
|Figure7: For the fastlane sweep, the slow lane is AC-decoupled from theconverter|
The power stage pole fp is around 20Hz and corresponds to
After f p , the power stage gaindecreases with a -1 slope until it reaches the 8kHz pole formed by (Rpullup ,Cpole ) of our type 2 compensator:
In Figure 5, Cpole corresponds to C11 and the Rpullup resistor is R7 . Once the network analyzer data have beenexported to Excel, we compute the real and the imaginary parts of thefast lane loop vector:
Then we can sum the real and the imaginary contributions to obtainthe total loop vector:
Finally, we extract the final loop gain and phase by entering theequations in Excel:
|Figure8: Two different voltage outputs are regulated using a common TL431,using a weighted sum configuration|
Let's apply a similar methodology to a multi-output power supply. Insuch an application, two different voltage outputs are regulated usinga common TL431, using a weighted sum configuration (Figure 8 above ).
The resistors connecting each output to the TL431 reference pin arecalculated, taking into account a relative weight of each output in thefeedback. This technique offers a way to improve cross-regulation in amulti-output converter by affecting a weight to certain outputs whoseprecision or load constraints are more important than the others.
|Figure9: Shown is a schematic of the two-switch forward power supplyfeaturing a weighted feedback with TL431.|
Of course, the sum of all weight must equal 100 percent. In the ATXworld, weighted feedback is often encountered in the so-called Silverboxes.
Figure 9 above represents asimplified two-output version of such a converter. In this two-switchforward converter, the two outputs (5V and 12V) are also coupled viatheir respective output inductors. Each output contributes to 50percent in the control loop, which uses a TL431 featuring a type 2compensation.
There are two loops we need to measure. One is a combination of thefast and slow lanes observing the +12V output. The other one is the +5Vloop entering the TL431 via the slow lane. We mentioned that measuringthe loop at the feedback in put of the controller is not practical.
To correctly measure the gain and phase of the feedback loop, the ACstimulus must be injected between a low impedance node (on the powersupply output side) and a high impedance node (on the control side).
When the injection is done as previously described (between theoutput of the power supply and the feedback circuitry), the conditionis optimal: The output impedance of the observed point is low, and theinput impedance of the feedback path is high.
|Figure10: An NPN buffer allows performing the loop gain measurement on theprimary side.|
But if we want to open the loop between the optocoupler and thefeedback pin of the controller, the conditions are not favorable:
The output impedance of the optocoupler is high (this is the pull upresistor in a common-emitter configuration), while the input impedanceof the FB pin can sometimes be affected by internal dividers or pull-upresistors (it was 5 kilo-ohms in our example). The use of a discretebuffer is still possible (Figure 10above ), but it clearly complicates the setup. However, themethod works and we recorded the result for reference.
|Figure11: Shown are the fast lane and 12V slow lane loop response obtainedwith the network analyzer.|
We will now measure one of the two loops independently, whilebiasing the other one with an external DC supply, as we did before.Individual measurement results are shown in Figure 11 above and Figure 12 below .
|Figure12: Shown is the 5V slow lane loop response obtained with the networkanalyzer.|
Finally, combining the two results using the Excel spreadsheetleads to the results shown in Figure13 below . As expected, the two-loop measurement is now validover the whole frequency range, with a constant slope of -20dB perdecade for the gain at low frequency, and a phase that keeps ondecreasing after the crossover frequency.
|Figure13: This plot shows the final combined loop gain and compares it withthe reference plot obtained with the configuration shown in Figure 10.|
Measuring the frequency response of a multiloop switchmode powersupply can be a real challenge, especially when all the regulationcircuitry is kept on the secondary side.
This is often the case with modern current mode controllers wherethe feedback input directly controls the peak current. We hope a simplemethod exists and combines individually measured loops with a simplemathematical manipulation. As presented by this article, this method isapplicable to a wide range of applications.
Christopher Basso is Director of Product ApplicationsEngineering, Nicolas Cyr is Senior Applications Engineer and StephanieConseil is Applications Engineer at ON Semiconductor Corp.