Using programmable spread spectrum clock generators for EMI Reduction -

Using programmable spread spectrum clock generators for EMI Reduction


Electromagnetic interference (EMI) is energy that adversely affects theperformance of electrical/electronic equipment by creating undesirableresponses or complete operational failure.

EMI is caused either byradiated electromagnetic fields or conducted voltages and currents.High clock frequencies and short-edge rates in present high-speeddigital systems result in EMI problems.

An important source of both conducted and radiated EMI is electricalequipment coupled to AC electrical lines such as computers, switchingpower supplies, and electrical devices which utilize electrical motors,such as refrigerators, air conditioners, and treadmills.

Once EMI from an electrical device is conducted into an electricalwiring circuit, the wiring may act as an antenna and “broadcast” theconducted EMI as RFI (radio frequency interference)throughout a structure.

Figure1. Hershey Kiss Spread Spectrum Clock Frequency Profile in Time Domain

The effects of EMI can range from minor nuisances to catastrophicfailures and so it is important to effectively control EMI. Electromagnetic Compatibility (EMC)is the ability of the systems to operate within their intendedenvironment without conducting or radiating excessive amounts ofelectromagnetic energy.

EMI Standards and Associated Cost
EMC standards are designed to ensure that items of electronic equipmentdo not cause problems to each others operation or, even worse, giverise to equipment malfunctions.

Regulatory requirements regarding EMI shielding for consumerelectronics applications ” including televisions, radios, portableentertainment, electronic games, and Internet appliances ” varies fromcountry to country.

EMI Specifications have been issued by various organizations. In theUnited States, the FCC has issued Part 15, sub-part J, for Class A andB devices. Class A and level A describe industrial equipment, whileClass B and level B are applicable to consumer equipment. EMI rulesreduce interference between electronic devices and address health andsafety concerns.

Figure2. Spread Spectrum Clock Frequency Profile in Frequency Domain

The typical factors considered in the EMI control plan are:

1) PCBLayout ” Segregation of Sensitive components, Power& Ground Planes
2) Circuitcurrent ” Emissions increase linearly with current
3) Frequency,including slew rates ” Emissions increase Square of the Frequency
4) Bandwidth
5) Circuit loop area ” To beHeld to Minimum
6) Shielding/ Filtering ” A combination of proper design, filteringand shielding, and other techniques to achieve the required levels ofemissions in the most economical way
7) SpreadSpectrum Clock ” appropriate spread amount and modulationfrequency
8) The ability to dither thecenter frequency of clocks used in an application system in order tospread radiated emission energy over a band of frequencies rather thanhaving all the energy emitted at one frequency.

EMI Control & ReductionTechniques
There are two fundamental methods of EMI control and reduction:Suppression and Absorption. The most common methods of noise reductioninclude proper equipment circuit design, shielding, grounding,filtering, isolation, separation and orientation, circuit impedancelevel control, cable design, and noise cancellation techniques.

These methods require the use of passive and active components suchas filters, chokes, ferrite beads, sheets and foils, shielding alongwith various PCB layout rules, and Spread Spectrum Clock Generators (SSCG).

Figure3. Hershey Kiss Spread Profile Advantage

Attacking EMI Problems at the Source
A fundamental EMC design principle requires that EMI be attenuated atits source on the PCB. Spread-spectrum techniques are methods by whichenergy generated in a particular bandwidth is deliberately spread inthe frequency domain, resulting in a signal with a wider bandwidth. Aspread spectrum clock generator (SSCG) performs this spreading fordesigners.

When selecting a spread spectrum clock to attenuate EMI for aconsumer product, developers must ensure:

1) The system still passes EMI regulationtests . Goodfrequency profile and modulation frequency are most important. Ahigh-quality Hershey Kiss frequency profile gives the best performancein EMI reduction; a triangle frequency profile requires a larger spreadamount to achieve the same EMI reduction (Figure 1 to Figure 3 above ). Higher modulation frequencyusually offers higher EMI attenuation (Figure4 below ).

2) System performance is maintained even withspreading side effects. First, the PLL must run at anoptimum state, e.g. high PFD and VCO frequency, appropriate bandwidth,etc. Second, the frequency spread amount usually should be as small aspossible to keep system timing margin high and cycle-cycle jitter low.For down spread, a lower spread amount makes a system run less slow bynot reducing too much on average frequency.

3) Minimal impact on overall system cost. Spread spectrum clock chip price is traditionally a major price factorin consumer electronics applications. However, as the complexity ofconsumer systems has goes up dramatically in recent years, developmentcost and risk have to be seriously considered as well.

For example, if even one requirement is not met, no matter if it isEMI or jitter performance, applications are more likely to require amodification to the system clock. The flexibility an of a programmableEMI approach offers insurance by reducing potential development costand risk.

Figure4. Attenuation Optimization with Modulation Frequency

Spread Spectrum Clock Generators
Spread Spectrum Clock Generators (SSCG) can be categorized intoprogrammable and non-programmable types, as well as by whether theyhave a Hershey Kiss and triangular spread frequency profile shape. Thespread spectrum clock requirements for different consumer systems varyin frequency, center or down spread, spread amount, modulationfrequency, Hershey Kissortriangle profile type, etc.

As non-programmable spread spectrum clock chips are customized forspecific applications ” offer several fixed selectable options likefrequency ranges and spread amounts ” it can be difficult to meetoptimum spread requirements while maximizing cost/performance.

Most fixed function clock chips on the market offer several fixedselectable input frequency ranges (e.g. 20-40MHz, 40-80MHz and80-160MHz) and spread percentages (e.g. 0.5%, 1%, 2% and 3%).Optimization requires two sets of PLL parameters ” one set for EMIreduction performance, another for PLL performance.

Figure5. Frequency Scaling in a GP SSCG Buffer Chip

Several undesired side effects arise when actual configurationdeviates from these optimized settings. For example, when the inputfrequency is not at the center of a selection range, VCO and modulationfrequency is linearly scaled (Figure 6below ).

The frequency profile may be distorted if PLL bandwidth is low (which it usually is for controllingcycle-cycle jitter, as shown in Figure 6 below ), which impairsEMI performance.

At the low input frequency boundary, the worst happens: because ofthe low PFD and VCO frequency, cycle-cycle jitter is significantlyincreased, and because of the low modulation frequency and possiblefrequency profile distortion, EMI reduction is significantly reduced.

Figure6. Frequency Scaled and Optimized Profiles Comparison

When spread amount selection is limited, developers will be forcedto select a larger than necessary spread amount. This typicallyincreases cycle-cycle jitter and reduces the timing budget for thesystem.

If none of the spread percentages satisfies the system, developersmust request the clock manufacturer to make design changes andmanufacture a new chip, which at best takes several weeks even for asimple metal layer change and is often very expensive.

Alternatively, a programmable spread spectrum clock generatorprovides general purpose clocks supporting field programmabilitycombined with on-chip non-volatile memory that enables dynamicreconfiguration of spread parameters, eliminating slow and expensivechip design changes.

Programmability also allows optimization for the best spreadspectrum clock performance at desired specifications. For example,developers can define exact spread amounts like 2.1% (instead of 3% byselection), or optimize modulation patterns for the desired frequencysetting, etc.

Figure 4 earlier shows howmodulation frequency optimization, using a 4-PLLclock chip with 2 spread spectrum PLLs can easily provide anincrease of -3 to -4 dB in EMI reduction. Either of the spreading PLLshas two independent spread pattern selections.

Most developers prefer Hershey Kiss spread clock for better EMIperformance, but many clock companies only offer linear spread clock.Ideally, an SSCG should offer both Hershey Kiss and linear spreadclocks. Figure 3 shows Hershey Kiss spread increased attenuation by-1.67dB for one test case with the4-PLL clock chip  shown above.

Moreover, important clock parameters, like PLL charge pump current,VCO gain, and output drive strength, should be programmable. Suchflexibility greatly improves system performance, reduces systemdevelopment time, and allows last minute changes while reducing risk.

Shuliang Li is Sr. Staff DesignEngineer, and Narayan Purohit is Director of Marketing, at Cypress Semiconductor.

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