VarioTAP extended to handle non-JTAG debug interfaces - Embedded.com

VarioTAP extended to handle non-JTAG debug interfaces

Goepel Electronic has extend its VariopTAP emulation technology to support non-JTAG debug interfaces to enable broad coverage of various proprietary debug architectures of different chip manufacturers without utilising processor specific pods.

The first interfaces to be supported are the background debug mode (BDM) interface and the MCU of the Freescale MPC5xx series with power architecture. The functionality of VarioTAP ranges from flash programming up to emulation test at system level.

It now provides equal treatment of JTAG and non JTAG interfaces. The non JTAG targets are connected to an available access port, whereby a mixture with JTAG targets via several ports is possible. By using the Scanflex hardware platform up to eight different targets can be controlled.

Gang applications such as simultaneous flash programming are also supported. During the programming of embedded or external flash, the script generation is done automatically. The IP functions for bus emulation and system emulation enable a functional test of on-chip interfaces without prior flash firmware programming as well as the execution of customer defined program codes by means of a VarioTAP model API. The latest VarioTAP IP models are supported as standard starting from System Cascon version 4.5.3, and are activated by the licence manager like the system software. System Cascon a JTAG/boundary scan development environment, developed by Goepel with currently more than 40 completely integrated ISP, test, and debug tools.

Goepel Electronic

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